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[WebAssembly] Optimize ISel for SIMD Boolean reductions
Summary: Converting the result *.{all,any}_true to a bool at the source level generates LLVM IR that compares the result to 0. This check is redundant since these instructions already return either 0 or 1 and therefore conform to the BooleanContents setting for WebAssembly. This CL adds patterns to detect and remove such redundant operations on the result of Boolean reductions. Reviewers: dschuff, aheejin Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63529 llvm-svn: 363756
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‎llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

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@@ -527,6 +527,28 @@ defm ANYTRUE : SIMDReduce<int_wasm_anytrue, "any_true", 82>;
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// All lanes true: all_true
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defm ALLTRUE : SIMDReduce<int_wasm_alltrue, "all_true", 83>;
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// Reductions already return 0 or 1, so and 1, setne 0, and seteq 1
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// can be folded out
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foreach reduction =
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[["int_wasm_anytrue", "ANYTRUE"], ["int_wasm_alltrue", "ALLTRUE"]] in
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foreach ty = [v16i8, v8i16, v4i32, v2i64] in {
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def : Pat<(i32 (and
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(i32 (!cast<Intrinsic>(reduction[0]) (ty V128:$x))),
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(i32 1)
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)),
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(i32 (!cast<NI>(reduction[1]#"_"#ty) (ty V128:$x)))>;
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def : Pat<(i32 (setne
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(i32 (!cast<Intrinsic>(reduction[0]) (ty V128:$x))),
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(i32 0)
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)),
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(i32 (!cast<NI>(reduction[1]#"_"#ty) (ty V128:$x)))>;
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def : Pat<(i32 (seteq
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(i32 (!cast<Intrinsic>(reduction[0]) (ty V128:$x))),
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(i32 1)
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)),
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(i32 (!cast<NI>(reduction[1]#"_"#ty) (ty V128:$x)))>;
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}
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//===----------------------------------------------------------------------===//
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// Bit shifts
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//===----------------------------------------------------------------------===//

‎llvm/test/CodeGen/WebAssembly/simd-reductions.ll

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@@ -0,0 +1,295 @@
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; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+unimplemented-simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
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; Tests that redundant masking and conversions are folded out
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; following SIMD reduction instructions.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; ==============================================================================
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; 16 x i8
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; ==============================================================================
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declare i32 @llvm.wasm.anytrue.v16i8(<16 x i8>)
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declare i32 @llvm.wasm.alltrue.v16i8(<16 x i8>)
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; CHECK-LABEL: any_v16i8_trunc:
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; SIMD128-NEXT: .functype any_v16i8_trunc (v128) -> (i32){{$}}
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; SIMD128-NEXT: i8x16.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v16i8_trunc(<16 x i8> %x) {
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%a = call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> %x)
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%b = trunc i32 %a to i1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: any_v16i8_ne:
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; SIMD128-NEXT: .functype any_v16i8_ne (v128) -> (i32){{$}}
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; SIMD128-NEXT: i8x16.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v16i8_ne(<16 x i8> %x) {
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%a = call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> %x)
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%b = icmp ne i32 %a, 0
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: any_v16i8_eq:
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; SIMD128-NEXT: .functype any_v16i8_eq (v128) -> (i32){{$}}
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; SIMD128-NEXT: i8x16.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v16i8_eq(<16 x i8> %x) {
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%a = call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> %x)
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%b = icmp eq i32 %a, 1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v16i8_trunc:
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; SIMD128-NEXT: .functype all_v16i8_trunc (v128) -> (i32){{$}}
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; SIMD128-NEXT: i8x16.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v16i8_trunc(<16 x i8> %x) {
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%a = call i32 @llvm.wasm.alltrue.v16i8(<16 x i8> %x)
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%b = trunc i32 %a to i1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v16i8_ne:
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; SIMD128-NEXT: .functype all_v16i8_ne (v128) -> (i32){{$}}
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; SIMD128-NEXT: i8x16.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v16i8_ne(<16 x i8> %x) {
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%a = call i32 @llvm.wasm.alltrue.v16i8(<16 x i8> %x)
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%b = icmp ne i32 %a, 0
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v16i8_eq:
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; SIMD128-NEXT: .functype all_v16i8_eq (v128) -> (i32){{$}}
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; SIMD128-NEXT: i8x16.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v16i8_eq(<16 x i8> %x) {
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%a = call i32 @llvm.wasm.alltrue.v16i8(<16 x i8> %x)
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%b = icmp eq i32 %a, 1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; ==============================================================================
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; 8 x i16
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; ==============================================================================
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declare i32 @llvm.wasm.anytrue.v8i16(<8 x i16>)
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declare i32 @llvm.wasm.alltrue.v8i16(<8 x i16>)
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; CHECK-LABEL: any_v8i16_trunc:
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; SIMD128-NEXT: .functype any_v8i16_trunc (v128) -> (i32){{$}}
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; SIMD128-NEXT: i16x8.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v8i16_trunc(<8 x i16> %x) {
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%a = call i32 @llvm.wasm.anytrue.v8i16(<8 x i16> %x)
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%b = trunc i32 %a to i1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: any_v8i16_ne:
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; SIMD128-NEXT: .functype any_v8i16_ne (v128) -> (i32){{$}}
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; SIMD128-NEXT: i16x8.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v8i16_ne(<8 x i16> %x) {
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%a = call i32 @llvm.wasm.anytrue.v8i16(<8 x i16> %x)
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%b = icmp ne i32 %a, 0
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: any_v8i16_eq:
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; SIMD128-NEXT: .functype any_v8i16_eq (v128) -> (i32){{$}}
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; SIMD128-NEXT: i16x8.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v8i16_eq(<8 x i16> %x) {
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%a = call i32 @llvm.wasm.anytrue.v8i16(<8 x i16> %x)
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%b = icmp eq i32 %a, 1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v8i16_trunc:
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; SIMD128-NEXT: .functype all_v8i16_trunc (v128) -> (i32){{$}}
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; SIMD128-NEXT: i16x8.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v8i16_trunc(<8 x i16> %x) {
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%a = call i32 @llvm.wasm.alltrue.v8i16(<8 x i16> %x)
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%b = trunc i32 %a to i1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v8i16_ne:
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; SIMD128-NEXT: .functype all_v8i16_ne (v128) -> (i32){{$}}
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; SIMD128-NEXT: i16x8.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v8i16_ne(<8 x i16> %x) {
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%a = call i32 @llvm.wasm.alltrue.v8i16(<8 x i16> %x)
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%b = icmp ne i32 %a, 0
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v8i16_eq:
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; SIMD128-NEXT: .functype all_v8i16_eq (v128) -> (i32){{$}}
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; SIMD128-NEXT: i16x8.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v8i16_eq(<8 x i16> %x) {
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%a = call i32 @llvm.wasm.alltrue.v8i16(<8 x i16> %x)
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%b = icmp eq i32 %a, 1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; ==============================================================================
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; 4 x i32
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; ==============================================================================
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declare i32 @llvm.wasm.anytrue.v4i32(<4 x i32>)
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declare i32 @llvm.wasm.alltrue.v4i32(<4 x i32>)
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; CHECK-LABEL: any_v4i32_trunc:
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; SIMD128-NEXT: .functype any_v4i32_trunc (v128) -> (i32){{$}}
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; SIMD128-NEXT: i32x4.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v4i32_trunc(<4 x i32> %x) {
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%a = call i32 @llvm.wasm.anytrue.v4i32(<4 x i32> %x)
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%b = trunc i32 %a to i1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: any_v4i32_ne:
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; SIMD128-NEXT: .functype any_v4i32_ne (v128) -> (i32){{$}}
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; SIMD128-NEXT: i32x4.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v4i32_ne(<4 x i32> %x) {
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%a = call i32 @llvm.wasm.anytrue.v4i32(<4 x i32> %x)
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%b = icmp ne i32 %a, 0
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: any_v4i32_eq:
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; SIMD128-NEXT: .functype any_v4i32_eq (v128) -> (i32){{$}}
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; SIMD128-NEXT: i32x4.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v4i32_eq(<4 x i32> %x) {
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%a = call i32 @llvm.wasm.anytrue.v4i32(<4 x i32> %x)
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%b = icmp eq i32 %a, 1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v4i32_trunc:
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; SIMD128-NEXT: .functype all_v4i32_trunc (v128) -> (i32){{$}}
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; SIMD128-NEXT: i32x4.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v4i32_trunc(<4 x i32> %x) {
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%a = call i32 @llvm.wasm.alltrue.v4i32(<4 x i32> %x)
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%b = trunc i32 %a to i1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v4i32_ne:
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; SIMD128-NEXT: .functype all_v4i32_ne (v128) -> (i32){{$}}
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; SIMD128-NEXT: i32x4.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v4i32_ne(<4 x i32> %x) {
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%a = call i32 @llvm.wasm.alltrue.v4i32(<4 x i32> %x)
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%b = icmp ne i32 %a, 0
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v4i32_eq:
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; SIMD128-NEXT: .functype all_v4i32_eq (v128) -> (i32){{$}}
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; SIMD128-NEXT: i32x4.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v4i32_eq(<4 x i32> %x) {
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%a = call i32 @llvm.wasm.alltrue.v4i32(<4 x i32> %x)
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%b = icmp eq i32 %a, 1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; ==============================================================================
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; 2 x i64
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; ==============================================================================
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declare i32 @llvm.wasm.anytrue.v2i64(<2 x i64>)
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declare i32 @llvm.wasm.alltrue.v2i64(<2 x i64>)
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; CHECK-LABEL: any_v2i64_trunc:
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; SIMD128-NEXT: .functype any_v2i64_trunc (v128) -> (i32){{$}}
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; SIMD128-NEXT: i64x2.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v2i64_trunc(<2 x i64> %x) {
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%a = call i32 @llvm.wasm.anytrue.v2i64(<2 x i64> %x)
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%b = trunc i32 %a to i1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: any_v2i64_ne:
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; SIMD128-NEXT: .functype any_v2i64_ne (v128) -> (i32){{$}}
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; SIMD128-NEXT: i64x2.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v2i64_ne(<2 x i64> %x) {
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%a = call i32 @llvm.wasm.anytrue.v2i64(<2 x i64> %x)
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%b = icmp ne i32 %a, 0
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: any_v2i64_eq:
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; SIMD128-NEXT: .functype any_v2i64_eq (v128) -> (i32){{$}}
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; SIMD128-NEXT: i64x2.any_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @any_v2i64_eq(<2 x i64> %x) {
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%a = call i32 @llvm.wasm.anytrue.v2i64(<2 x i64> %x)
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%b = icmp eq i32 %a, 1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v2i64_trunc:
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; SIMD128-NEXT: .functype all_v2i64_trunc (v128) -> (i32){{$}}
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; SIMD128-NEXT: i64x2.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v2i64_trunc(<2 x i64> %x) {
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%a = call i32 @llvm.wasm.alltrue.v2i64(<2 x i64> %x)
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%b = trunc i32 %a to i1
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v2i64_ne:
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; SIMD128-NEXT: .functype all_v2i64_ne (v128) -> (i32){{$}}
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; SIMD128-NEXT: i64x2.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v2i64_ne(<2 x i64> %x) {
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%a = call i32 @llvm.wasm.alltrue.v2i64(<2 x i64> %x)
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%b = icmp ne i32 %a, 0
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; CHECK-LABEL: all_v2i64_eq:
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; SIMD128-NEXT: .functype all_v2i64_eq (v128) -> (i32){{$}}
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; SIMD128-NEXT: i64x2.all_true $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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define i32 @all_v2i64_eq(<2 x i64> %x) {
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%a = call i32 @llvm.wasm.alltrue.v2i64(<2 x i64> %x)
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%b = icmp eq i32 %a, 1
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%c = zext i1 %b to i32
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ret i32 %c
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}

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