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Merge branch 'drm-nouveau-fixes-3.8' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next
Fixes the accel support for nvd9 + kepler chipsets, also fixes GK106 support. * 'drm-nouveau-fixes-3.8' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: drm/nve0/graph: fix fuc, and enable acceleration on all known chipsets drm/nvc0/graph: fix fuc, and enable acceleration on GF119 drm/nouveau/bios: cache ramcfg strap on later chipsets drm/nouveau/mxm: silence output if no bios data drm/nouveau/bios: parse/display extra version component drm/nouveau/bios: implement opcode 0xa9 drm/nouveau/bios: update gpio parsing apis to match current design drm/nouveau: initial support for GK106
2 parents a49f0d1 + eca1529 commit 344f906

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21 files changed

+389
-242
lines changed

21 files changed

+389
-242
lines changed

‎drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,11 @@ chipsets:
5757
.b16 #nve4_gpc_mmio_tail
5858
.b16 #nve4_tpc_mmio_head
5959
.b16 #nve4_tpc_mmio_tail
60+
.b8 0xe6 0 0 0
61+
.b16 #nve4_gpc_mmio_head
62+
.b16 #nve4_gpc_mmio_tail
63+
.b16 #nve4_tpc_mmio_head
64+
.b16 #nve4_tpc_mmio_tail
6065
.b8 0 0 0 0
6166

6267
// GPC mmio lists

‎drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc.h

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -34,13 +34,16 @@ uint32_t nve0_grgpc_data[] = {
3434
0x00000000,
3535
/* 0x0064: chipsets */
3636
0x000000e4,
37-
0x01040080,
38-
0x014c0104,
37+
0x0110008c,
38+
0x01580110,
3939
0x000000e7,
40-
0x01040080,
41-
0x014c0104,
40+
0x0110008c,
41+
0x01580110,
42+
0x000000e6,
43+
0x0110008c,
44+
0x01580110,
4245
0x00000000,
43-
/* 0x0080: nve4_gpc_mmio_head */
46+
/* 0x008c: nve4_gpc_mmio_head */
4447
0x00000380,
4548
0x04000400,
4649
0x0800040c,
@@ -74,8 +77,8 @@ uint32_t nve0_grgpc_data[] = {
7477
0x14003100,
7578
0x000031d0,
7679
0x040031e0,
77-
/* 0x0104: nve4_gpc_mmio_tail */
78-
/* 0x0104: nve4_tpc_mmio_head */
80+
/* 0x0110: nve4_gpc_mmio_tail */
81+
/* 0x0110: nve4_tpc_mmio_head */
7982
0x00000048,
8083
0x00000064,
8184
0x00000088,

‎drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -754,6 +754,16 @@ ctx_mmio_exec:
754754
// on load it means: "a save preceeded this load"
755755
//
756756
ctx_xfer:
757+
// according to mwk, some kind of wait for idle
758+
mov $r15 0xc00
759+
shl b32 $r15 6
760+
mov $r14 4
761+
iowr I[$r15 + 0x200] $r14
762+
ctx_xfer_idle:
763+
iord $r14 I[$r15 + 0x000]
764+
and $r14 0x2000
765+
bra ne #ctx_xfer_idle
766+
757767
bra not $p1 #ctx_xfer_pre
758768
bra $p2 #ctx_xfer_pre_load
759769
ctx_xfer_pre:

‎drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc.h

Lines changed: 74 additions & 73 deletions
Original file line numberDiff line numberDiff line change
@@ -799,79 +799,80 @@ uint32_t nvc0_grhub_code[] = {
799799
0x01fa0613,
800800
0xf803f806,
801801
/* 0x0829: ctx_xfer */
802-
0x0611f400,
803-
/* 0x082f: ctx_xfer_pre */
804-
0xf01102f4,
805-
0x21f510f7,
806-
0x21f50698,
807-
0x11f40631,
808-
/* 0x083d: ctx_xfer_pre_load */
809-
0x02f7f01c,
810-
0x065721f5,
811-
0x066621f5,
812-
0x067821f5,
813-
0x21f5f4bd,
814-
0x21f50657,
815-
/* 0x0856: ctx_xfer_exec */
816-
0x019806b8,
817-
0x1427f116,
818-
0x0624b604,
819-
0xf10020d0,
820-
0xf0a500e7,
821-
0x1fb941e3,
822-
0x8d21f402,
823-
0xf004e0b6,
824-
0x2cf001fc,
825-
0x0124b602,
826-
0xf405f2fd,
827-
0x17f18d21,
828-
0x13f04afc,
829-
0x0c27f002,
830-
0xf50012d0,
831-
0xf1020721,
832-
0xf047fc27,
833-
0x20d00223,
834-
0x012cf000,
835-
0xd00320b6,
836-
0xacf00012,
837-
0x06a5f001,
838-
0x9800b7f0,
839-
0x0d98140c,
840-
0x00e7f015,
841-
0x015c21f5,
842-
0xf508a7f0,
843-
0xf5010321,
844-
0xf4020721,
845-
0xa7f02201,
846-
0xc921f40c,
847-
0x0a1017f1,
848-
0xf00614b6,
849-
0x12d00527,
850-
/* 0x08dd: ctx_xfer_post_save_wait */
851-
0x0012cf00,
852-
0xf40522fd,
853-
0x02f4fa1b,
854-
/* 0x08e9: ctx_xfer_post */
855-
0x02f7f032,
856-
0x065721f5,
857-
0x21f5f4bd,
858-
0x21f50698,
859-
0x21f50226,
860-
0xf4bd0666,
861-
0x065721f5,
862-
0x981011f4,
863-
0x11fd8001,
864-
0x070bf405,
865-
0x07df21f5,
866-
/* 0x0914: ctx_xfer_no_post_mmio */
867-
0x064921f5,
868-
/* 0x0918: ctx_xfer_done */
869-
0x000000f8,
870-
0x00000000,
871-
0x00000000,
872-
0x00000000,
873-
0x00000000,
874-
0x00000000,
802+
0x00f7f100,
803+
0x06f4b60c,
804+
0xd004e7f0,
805+
/* 0x0836: ctx_xfer_idle */
806+
0xfecf80fe,
807+
0x00e4f100,
808+
0xf91bf420,
809+
0xf40611f4,
810+
/* 0x0846: ctx_xfer_pre */
811+
0xf7f01102,
812+
0x9821f510,
813+
0x3121f506,
814+
0x1c11f406,
815+
/* 0x0854: ctx_xfer_pre_load */
816+
0xf502f7f0,
817+
0xf5065721,
818+
0xf5066621,
819+
0xbd067821,
820+
0x5721f5f4,
821+
0xb821f506,
822+
/* 0x086d: ctx_xfer_exec */
823+
0x16019806,
824+
0x041427f1,
825+
0xd00624b6,
826+
0xe7f10020,
827+
0xe3f0a500,
828+
0x021fb941,
829+
0xb68d21f4,
830+
0xfcf004e0,
831+
0x022cf001,
832+
0xfd0124b6,
833+
0x21f405f2,
834+
0xfc17f18d,
835+
0x0213f04a,
836+
0xd00c27f0,
837+
0x21f50012,
838+
0x27f10207,
839+
0x23f047fc,
840+
0x0020d002,
841+
0xb6012cf0,
842+
0x12d00320,
843+
0x01acf000,
844+
0xf006a5f0,
845+
0x0c9800b7,
846+
0x150d9814,
847+
0xf500e7f0,
848+
0xf0015c21,
849+
0x21f508a7,
850+
0x21f50103,
851+
0x01f40207,
852+
0x0ca7f022,
853+
0xf1c921f4,
854+
0xb60a1017,
855+
0x27f00614,
856+
0x0012d005,
857+
/* 0x08f4: ctx_xfer_post_save_wait */
858+
0xfd0012cf,
859+
0x1bf40522,
860+
0x3202f4fa,
861+
/* 0x0900: ctx_xfer_post */
862+
0xf502f7f0,
863+
0xbd065721,
864+
0x9821f5f4,
865+
0x2621f506,
866+
0x6621f502,
867+
0xf5f4bd06,
868+
0xf4065721,
869+
0x01981011,
870+
0x0511fd80,
871+
0xf5070bf4,
872+
/* 0x092b: ctx_xfer_no_post_mmio */
873+
0xf507df21,
874+
/* 0x092f: ctx_xfer_done */
875+
0xf8064921,
875876
0x00000000,
876877
0x00000000,
877878
0x00000000,

‎drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,9 @@ chipsets:
4444
.b8 0xe7 0 0 0
4545
.b16 #nve4_hub_mmio_head
4646
.b16 #nve4_hub_mmio_tail
47+
.b8 0xe6 0 0 0
48+
.b16 #nve4_hub_mmio_head
49+
.b16 #nve4_hub_mmio_tail
4750
.b8 0 0 0 0
4851

4952
nve4_hub_mmio_head:
@@ -680,6 +683,16 @@ ctx_mmio_exec:
680683
// on load it means: "a save preceeded this load"
681684
//
682685
ctx_xfer:
686+
// according to mwk, some kind of wait for idle
687+
mov $r15 0xc00
688+
shl b32 $r15 6
689+
mov $r14 4
690+
iowr I[$r15 + 0x200] $r14
691+
ctx_xfer_idle:
692+
iord $r14 I[$r15 + 0x000]
693+
and $r14 0x2000
694+
bra ne #ctx_xfer_idle
695+
683696
bra not $p1 #ctx_xfer_pre
684697
bra $p2 #ctx_xfer_pre_load
685698
ctx_xfer_pre:

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