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torvaldstorvalds
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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle: "Various fixes across the tree. The modpost error due to virt_addr_valid() not being usable from modules required a number of preparatory cleanups so a clean fix was possible." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: 64-bit: Fix build if !CONFIG_MODULES MIPS: Wire up finit_module syscall. MIPS: Fix modpost error in modules attepting to use virt_addr_valid(). MIPS: page.h: Remove now unnecessary #ifndef __ASSEMBLY__ wrapper. MIPS: Switch remaining assembler PAGE_SIZE users to <asm/asm-offsets.h>. MIPS: Include PAGE_S{IZE,HIFT} in <asm/offset.h>. MIPS: Don't include <asm/page.h> unnecessarily. MIPS: Fix comment. Revert "MIPS: Optimise TLB handlers for MIPS32/64 R2 cores." MIPS: perf: Fix build failure in XLP perf support. MIPS: Alchemy: Make 32kHz and r4k timer coexist peacefully
2 parents d0631c6 + 2f12fb2 commit 5ce2955

22 files changed

+44
-104
lines changed

‎arch/mips/Kconfig

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -39,8 +39,8 @@ config MIPS
3939
select GENERIC_CLOCKEVENTS
4040
select GENERIC_CMOS_UPDATE
4141
select HAVE_MOD_ARCH_SPECIFIC
42-
select MODULES_USE_ELF_REL
43-
select MODULES_USE_ELF_RELA if 64BIT
42+
select MODULES_USE_ELF_REL if MODULES
43+
select MODULES_USE_ELF_RELA if MODULES && 64BIT
4444

4545
menu "Machine selection"
4646

‎arch/mips/alchemy/common/time.c

Lines changed: 5 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@ static struct clocksource au1x_counter1_clocksource = {
5353
.read = au1x_counter1_read,
5454
.mask = CLOCKSOURCE_MASK(32),
5555
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
56-
.rating = 100,
56+
.rating = 1500,
5757
};
5858

5959
static int au1x_rtcmatch2_set_next_event(unsigned long delta,
@@ -84,7 +84,7 @@ static irqreturn_t au1x_rtcmatch2_irq(int irq, void *dev_id)
8484
static struct clock_event_device au1x_rtcmatch2_clockdev = {
8585
.name = "rtcmatch2",
8686
.features = CLOCK_EVT_FEAT_ONESHOT,
87-
.rating = 100,
87+
.rating = 1500,
8888
.set_next_event = au1x_rtcmatch2_set_next_event,
8989
.set_mode = au1x_rtcmatch2_set_mode,
9090
.cpumask = cpu_all_mask,
@@ -158,20 +158,6 @@ static int __init alchemy_time_init(unsigned int m2int)
158158
return -1;
159159
}
160160

161-
static void __init alchemy_setup_c0timer(void)
162-
{
163-
/*
164-
* MIPS kernel assigns 'au1k_wait' to 'cpu_wait' before this
165-
* function is called. Because the Alchemy counters are unusable
166-
* the C0 timekeeping code is installed and use of the 'wait'
167-
* instruction must be prohibited, which is done most easily by
168-
* assigning NULL to cpu_wait.
169-
*/
170-
cpu_wait = NULL;
171-
r4k_clockevent_init();
172-
init_r4k_clocksource();
173-
}
174-
175161
static int alchemy_m2inttab[] __initdata = {
176162
AU1000_RTC_MATCH2_INT,
177163
AU1500_RTC_MATCH2_INT,
@@ -186,8 +172,7 @@ void __init plat_time_init(void)
186172
int t;
187173

188174
t = alchemy_get_cputype();
189-
if (t == ALCHEMY_CPU_UNKNOWN)
190-
alchemy_setup_c0timer();
191-
else if (alchemy_time_init(alchemy_m2inttab[t]))
192-
alchemy_setup_c0timer();
175+
if (t == ALCHEMY_CPU_UNKNOWN ||
176+
alchemy_time_init(alchemy_m2inttab[t]))
177+
cpu_wait = NULL; /* wait doesn't work with r4k timer */
193178
}

‎arch/mips/include/asm/page.h

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -45,8 +45,6 @@
4545
#define HUGETLB_PAGE_ORDER ({BUILD_BUG(); 0; })
4646
#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
4747

48-
#ifndef __ASSEMBLY__
49-
5048
#include <linux/pfn.h>
5149
#include <asm/io.h>
5250

@@ -139,8 +137,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
139137
*/
140138
#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
141139

142-
#endif /* !__ASSEMBLY__ */
143-
144140
/*
145141
* __pa()/__va() should be used only during mem init.
146142
*/
@@ -202,7 +198,10 @@ typedef struct { unsigned long pgprot; } pgprot_t;
202198
#endif
203199

204200
#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys(kaddr)))
205-
#define virt_addr_valid(kaddr) pfn_valid(PFN_DOWN(virt_to_phys(kaddr)))
201+
202+
extern int __virt_addr_valid(const volatile void *kaddr);
203+
#define virt_addr_valid(kaddr) \
204+
__virt_addr_valid((const volatile void *) (kaddr))
206205

207206
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
208207
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)

‎arch/mips/include/asm/thread_info.h

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -29,10 +29,11 @@ struct thread_info {
2929
__u32 cpu; /* current CPU */
3030
int preempt_count; /* 0 => preemptable, <0 => BUG */
3131

32-
mm_segment_t addr_limit; /* thread address space:
33-
0-0xBFFFFFFF for user-thead
34-
0-0xFFFFFFFF for kernel-thread
35-
*/
32+
mm_segment_t addr_limit; /*
33+
* thread address space limit:
34+
* 0x7fffffff for user-thead
35+
* 0xffffffff for kernel-thread
36+
*/
3637
struct restart_block restart_block;
3738
struct pt_regs *regs;
3839
};

‎arch/mips/include/uapi/asm/unistd.h

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -368,16 +368,17 @@
368368
#define __NR_process_vm_readv (__NR_Linux + 345)
369369
#define __NR_process_vm_writev (__NR_Linux + 346)
370370
#define __NR_kcmp (__NR_Linux + 347)
371+
#define __NR_finit_module (__NR_Linux + 348)
371372

372373
/*
373374
* Offset of the last Linux o32 flavoured syscall
374375
*/
375-
#define __NR_Linux_syscalls 347
376+
#define __NR_Linux_syscalls 348
376377

377378
#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
378379

379380
#define __NR_O32_Linux 4000
380-
#define __NR_O32_Linux_syscalls 347
381+
#define __NR_O32_Linux_syscalls 348
381382

382383
#if _MIPS_SIM == _MIPS_SIM_ABI64
383384

@@ -692,16 +693,17 @@
692693
#define __NR_process_vm_readv (__NR_Linux + 304)
693694
#define __NR_process_vm_writev (__NR_Linux + 305)
694695
#define __NR_kcmp (__NR_Linux + 306)
696+
#define __NR_finit_module (__NR_Linux + 307)
695697

696698
/*
697699
* Offset of the last Linux 64-bit flavoured syscall
698700
*/
699-
#define __NR_Linux_syscalls 306
701+
#define __NR_Linux_syscalls 307
700702

701703
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
702704

703705
#define __NR_64_Linux 5000
704-
#define __NR_64_Linux_syscalls 306
706+
#define __NR_64_Linux_syscalls 307
705707

706708
#if _MIPS_SIM == _MIPS_SIM_NABI32
707709

@@ -1021,15 +1023,16 @@
10211023
#define __NR_process_vm_readv (__NR_Linux + 309)
10221024
#define __NR_process_vm_writev (__NR_Linux + 310)
10231025
#define __NR_kcmp (__NR_Linux + 311)
1026+
#define __NR_finit_module (__NR_Linux + 312)
10241027

10251028
/*
10261029
* Offset of the last N32 flavoured syscall
10271030
*/
1028-
#define __NR_Linux_syscalls 311
1031+
#define __NR_Linux_syscalls 312
10291032

10301033
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
10311034

10321035
#define __NR_N32_Linux 6000
1033-
#define __NR_N32_Linux_syscalls 311
1036+
#define __NR_N32_Linux_syscalls 312
10341037

10351038
#endif /* _UAPI_ASM_UNISTD_H */

‎arch/mips/kernel/asm-offsets.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -200,6 +200,9 @@ void output_mm_defines(void)
200200
DEFINE(_PTRS_PER_PMD, PTRS_PER_PMD);
201201
DEFINE(_PTRS_PER_PTE, PTRS_PER_PTE);
202202
BLANK();
203+
DEFINE(_PAGE_SHIFT, PAGE_SHIFT);
204+
DEFINE(_PAGE_SIZE, PAGE_SIZE);
205+
BLANK();
203206
}
204207

205208
#ifdef CONFIG_32BIT

‎arch/mips/kernel/genex.S

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,6 @@
1919
#include <asm/mipsregs.h>
2020
#include <asm/stackframe.h>
2121
#include <asm/war.h>
22-
#include <asm/page.h>
2322
#include <asm/thread_info.h>
2423

2524
#define PANIC_PIC(msg) \
@@ -483,8 +482,8 @@ NESTED(nmi_handler, PT_SIZE, sp)
483482
MFC0 k1, CP0_ENTRYHI
484483
andi k1, 0xff /* ASID_MASK */
485484
MFC0 k0, CP0_EPC
486-
PTR_SRL k0, PAGE_SHIFT + 1
487-
PTR_SLL k0, PAGE_SHIFT + 1
485+
PTR_SRL k0, _PAGE_SHIFT + 1
486+
PTR_SLL k0, _PAGE_SHIFT + 1
488487
or k1, k0
489488
MTC0 k1, CP0_ENTRYHI
490489
mtc0_tlbw_hazard

‎arch/mips/kernel/head.S

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,6 @@
2121
#include <asm/asmmacro.h>
2222
#include <asm/irqflags.h>
2323
#include <asm/regdef.h>
24-
#include <asm/page.h>
2524
#include <asm/pgtable-bits.h>
2625
#include <asm/mipsregs.h>
2726
#include <asm/stackframe.h>

‎arch/mips/kernel/octeon_switch.S

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,6 @@
1515
#include <asm/fpregdef.h>
1616
#include <asm/mipsregs.h>
1717
#include <asm/asm-offsets.h>
18-
#include <asm/page.h>
1918
#include <asm/pgtable-bits.h>
2019
#include <asm/regdef.h>
2120
#include <asm/stackframe.h>

‎arch/mips/kernel/perf_event_mipsxx.c

Lines changed: 0 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -847,7 +847,6 @@ static const struct mips_perf_event xlp_event_map[PERF_COUNT_HW_MAX] = {
847847
[PERF_COUNT_HW_CACHE_MISSES] = { 0x07, CNTR_ALL }, /* PAPI_L1_ICM */
848848
[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x1b, CNTR_ALL }, /* PAPI_BR_CN */
849849
[PERF_COUNT_HW_BRANCH_MISSES] = { 0x1c, CNTR_ALL }, /* PAPI_BR_MSP */
850-
[PERF_COUNT_HW_BUS_CYCLES] = { UNSUPPORTED_PERF_EVENT_ID },
851850
};
852851

853852
/* 24K/34K/1004K cores can share the same cache event map. */
@@ -1115,24 +1114,12 @@ static const struct mips_perf_event xlp_cache_map
11151114
[C(RESULT_ACCESS)] = { 0x2f, CNTR_ALL }, /* PAPI_L1_DCW */
11161115
[C(RESULT_MISS)] = { 0x2e, CNTR_ALL }, /* PAPI_L1_STM */
11171116
},
1118-
[C(OP_PREFETCH)] = {
1119-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1120-
[C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1121-
},
11221117
},
11231118
[C(L1I)] = {
11241119
[C(OP_READ)] = {
11251120
[C(RESULT_ACCESS)] = { 0x04, CNTR_ALL }, /* PAPI_L1_ICA */
11261121
[C(RESULT_MISS)] = { 0x07, CNTR_ALL }, /* PAPI_L1_ICM */
11271122
},
1128-
[C(OP_WRITE)] = {
1129-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1130-
[C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1131-
},
1132-
[C(OP_PREFETCH)] = {
1133-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1134-
[C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1135-
},
11361123
},
11371124
[C(LL)] = {
11381125
[C(OP_READ)] = {
@@ -1143,56 +1130,31 @@ static const struct mips_perf_event xlp_cache_map
11431130
[C(RESULT_ACCESS)] = { 0x34, CNTR_ALL }, /* PAPI_L2_DCA */
11441131
[C(RESULT_MISS)] = { 0x36, CNTR_ALL }, /* PAPI_L2_DCM */
11451132
},
1146-
[C(OP_PREFETCH)] = {
1147-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1148-
[C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1149-
},
11501133
},
11511134
[C(DTLB)] = {
11521135
/*
11531136
* Only general DTLB misses are counted use the same event for
11541137
* read and write.
11551138
*/
11561139
[C(OP_READ)] = {
1157-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
11581140
[C(RESULT_MISS)] = { 0x2d, CNTR_ALL }, /* PAPI_TLB_DM */
11591141
},
11601142
[C(OP_WRITE)] = {
1161-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
11621143
[C(RESULT_MISS)] = { 0x2d, CNTR_ALL }, /* PAPI_TLB_DM */
11631144
},
1164-
[C(OP_PREFETCH)] = {
1165-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1166-
[C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1167-
},
11681145
},
11691146
[C(ITLB)] = {
11701147
[C(OP_READ)] = {
1171-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
11721148
[C(RESULT_MISS)] = { 0x08, CNTR_ALL }, /* PAPI_TLB_IM */
11731149
},
11741150
[C(OP_WRITE)] = {
1175-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
11761151
[C(RESULT_MISS)] = { 0x08, CNTR_ALL }, /* PAPI_TLB_IM */
11771152
},
1178-
[C(OP_PREFETCH)] = {
1179-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1180-
[C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1181-
},
11821153
},
11831154
[C(BPU)] = {
11841155
[C(OP_READ)] = {
1185-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
11861156
[C(RESULT_MISS)] = { 0x25, CNTR_ALL },
11871157
},
1188-
[C(OP_WRITE)] = {
1189-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1190-
[C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1191-
},
1192-
[C(OP_PREFETCH)] = {
1193-
[C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1194-
[C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1195-
},
11961158
},
11971159
};
11981160

‎arch/mips/kernel/r2300_switch.S

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,6 @@
1515
#include <asm/fpregdef.h>
1616
#include <asm/mipsregs.h>
1717
#include <asm/asm-offsets.h>
18-
#include <asm/page.h>
1918
#include <asm/regdef.h>
2019
#include <asm/stackframe.h>
2120
#include <asm/thread_info.h>

‎arch/mips/kernel/r4k_switch.S

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,6 @@
1515
#include <asm/fpregdef.h>
1616
#include <asm/mipsregs.h>
1717
#include <asm/asm-offsets.h>
18-
#include <asm/page.h>
1918
#include <asm/pgtable-bits.h>
2019
#include <asm/regdef.h>
2120
#include <asm/stackframe.h>

‎arch/mips/kernel/relocate_kernel.S

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,6 @@
99
#include <asm/asm.h>
1010
#include <asm/asmmacro.h>
1111
#include <asm/regdef.h>
12-
#include <asm/page.h>
1312
#include <asm/mipsregs.h>
1413
#include <asm/stackframe.h>
1514
#include <asm/addrspace.h>
@@ -50,7 +49,7 @@ process_entry:
5049
and s3, s2, 0x8
5150
beq s3, zero, process_entry
5251
and s2, s2, ~0x8
53-
li s6, (1 << PAGE_SHIFT) / SZREG
52+
li s6, (1 << _PAGE_SHIFT) / SZREG
5453

5554
copy_word:
5655
/* copy page word by word */

‎arch/mips/kernel/scall32-o32.S

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -583,6 +583,7 @@ einval: li v0, -ENOSYS
583583
sys sys_process_vm_readv 6 /* 4345 */
584584
sys sys_process_vm_writev 6
585585
sys sys_kcmp 5
586+
sys sys_finit_module 3
586587
.endm
587588

588589
/* We pre-compute the number of _instruction_ bytes needed to

‎arch/mips/kernel/scall64-64.S

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -422,4 +422,5 @@ sys_call_table:
422422
PTR sys_process_vm_readv
423423
PTR sys_process_vm_writev /* 5305 */
424424
PTR sys_kcmp
425+
PTR sys_finit_module
425426
.size sys_call_table,.-sys_call_table

‎arch/mips/kernel/scall64-n32.S

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -416,4 +416,5 @@ EXPORT(sysn32_call_table)
416416
PTR compat_sys_process_vm_readv
417417
PTR compat_sys_process_vm_writev /* 6310 */
418418
PTR sys_kcmp
419+
PTR sys_finit_module
419420
.size sysn32_call_table,.-sysn32_call_table

‎arch/mips/kernel/scall64-o32.S

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -540,4 +540,5 @@ sys_call_table:
540540
PTR compat_sys_process_vm_readv /* 4345 */
541541
PTR compat_sys_process_vm_writev
542542
PTR sys_kcmp
543+
PTR sys_finit_module
543544
.size sys_call_table,.-sys_call_table

‎arch/mips/kernel/vmlinux.lds.S

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,8 @@
11
#include <asm/asm-offsets.h>
2-
#include <asm/page.h>
32
#include <asm/thread_info.h>
43

4+
#define PAGE_SIZE _PAGE_SIZE
5+
56
/*
67
* Put .bss..swapper_pg_dir as the first thing in .bss. This will
78
* ensure that it has .bss alignment (64K).

‎arch/mips/mm/ioremap.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -190,3 +190,9 @@ void __iounmap(const volatile void __iomem *addr)
190190

191191
EXPORT_SYMBOL(__ioremap);
192192
EXPORT_SYMBOL(__iounmap);
193+
194+
int __virt_addr_valid(const volatile void *kaddr)
195+
{
196+
return pfn_valid(PFN_DOWN(virt_to_phys(kaddr)));
197+
}
198+
EXPORT_SYMBOL_GPL(__virt_addr_valid);

‎arch/mips/mm/tlbex-fault.S

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,6 @@
77
* Copyright (C) 1999 Silicon Graphics, Inc.
88
*/
99
#include <asm/mipsregs.h>
10-
#include <asm/page.h>
1110
#include <asm/regdef.h>
1211
#include <asm/stackframe.h>
1312

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