@@ -3242,7 +3242,7 @@ static void wm8962_free_beep(struct snd_soc_codec *codec)
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}
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#endif
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- static void wm8962_set_gpio_mode (struct snd_soc_codec * codec , int gpio )
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+ static void wm8962_set_gpio_mode (struct wm8962_priv * wm8962 , int gpio )
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{
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int mask = 0 ;
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int val = 0 ;
@@ -3263,8 +3263,8 @@ static void wm8962_set_gpio_mode(struct snd_soc_codec *codec, int gpio)
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}
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if (mask )
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- snd_soc_update_bits ( codec , WM8962_ANALOGUE_CLOCKING1 ,
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- mask , val );
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+ regmap_update_bits ( wm8962 -> regmap , WM8962_ANALOGUE_CLOCKING1 ,
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+ mask , val );
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}
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#ifdef CONFIG_GPIOLIB
@@ -3276,7 +3276,6 @@ static inline struct wm8962_priv *gpio_to_wm8962(struct gpio_chip *chip)
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static int wm8962_gpio_request (struct gpio_chip * chip , unsigned offset )
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{
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struct wm8962_priv * wm8962 = gpio_to_wm8962 (chip );
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- struct snd_soc_codec * codec = wm8962 -> codec ;
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/* The WM8962 GPIOs aren't linearly numbered. For simplicity
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* we export linear numbers and error out if the unsupported
@@ -3292,7 +3291,7 @@ static int wm8962_gpio_request(struct gpio_chip *chip, unsigned offset)
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return - EINVAL ;
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}
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- wm8962_set_gpio_mode (codec , offset + 1 );
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+ wm8962_set_gpio_mode (wm8962 , offset + 1 );
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return 0 ;
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}
@@ -3376,8 +3375,7 @@ static int wm8962_probe(struct snd_soc_codec *codec)
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{
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int ret ;
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struct wm8962_priv * wm8962 = snd_soc_codec_get_drvdata (codec );
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- struct wm8962_pdata * pdata = & wm8962 -> pdata ;
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- int i , trigger , irq_pol ;
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+ int i ;
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bool dmicclk , dmicdat ;
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wm8962 -> codec = codec ;
@@ -3409,75 +3407,6 @@ static int wm8962_probe(struct snd_soc_codec *codec)
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}
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}
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- /* SYSCLK defaults to on; make sure it is off so we can safely
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- * write to registers if the device is declocked.
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- */
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- snd_soc_update_bits (codec , WM8962_CLOCKING2 , WM8962_SYSCLK_ENA , 0 );
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-
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- /* Ensure we have soft control over all registers */
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- snd_soc_update_bits (codec , WM8962_CLOCKING2 ,
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- WM8962_CLKREG_OVD , WM8962_CLKREG_OVD );
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-
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- /* Ensure that the oscillator and PLLs are disabled */
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- snd_soc_update_bits (codec , WM8962_PLL2 ,
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- WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA ,
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- 0 );
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-
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- /* Apply static configuration for GPIOs */
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- for (i = 0 ; i < ARRAY_SIZE (pdata -> gpio_init ); i ++ )
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- if (pdata -> gpio_init [i ]) {
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- wm8962_set_gpio_mode (codec , i + 1 );
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- snd_soc_write (codec , 0x200 + i ,
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- pdata -> gpio_init [i ] & 0xffff );
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- }
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-
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-
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- /* Put the speakers into mono mode? */
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- if (pdata -> spk_mono )
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- snd_soc_update_bits (codec , WM8962_CLASS_D_CONTROL_2 ,
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- WM8962_SPK_MONO_MASK , WM8962_SPK_MONO );
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-
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- /* Micbias setup, detection enable and detection
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- * threasholds. */
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- if (pdata -> mic_cfg )
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- snd_soc_update_bits (codec , WM8962_ADDITIONAL_CONTROL_4 ,
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- WM8962_MICDET_ENA |
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- WM8962_MICDET_THR_MASK |
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- WM8962_MICSHORT_THR_MASK |
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- WM8962_MICBIAS_LVL ,
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- pdata -> mic_cfg );
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-
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- /* Latch volume update bits */
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- snd_soc_update_bits (codec , WM8962_LEFT_INPUT_VOLUME ,
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- WM8962_IN_VU , WM8962_IN_VU );
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- snd_soc_update_bits (codec , WM8962_RIGHT_INPUT_VOLUME ,
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- WM8962_IN_VU , WM8962_IN_VU );
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- snd_soc_update_bits (codec , WM8962_LEFT_ADC_VOLUME ,
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- WM8962_ADC_VU , WM8962_ADC_VU );
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- snd_soc_update_bits (codec , WM8962_RIGHT_ADC_VOLUME ,
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- WM8962_ADC_VU , WM8962_ADC_VU );
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- snd_soc_update_bits (codec , WM8962_LEFT_DAC_VOLUME ,
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- WM8962_DAC_VU , WM8962_DAC_VU );
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- snd_soc_update_bits (codec , WM8962_RIGHT_DAC_VOLUME ,
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- WM8962_DAC_VU , WM8962_DAC_VU );
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- snd_soc_update_bits (codec , WM8962_SPKOUTL_VOLUME ,
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- WM8962_SPKOUT_VU , WM8962_SPKOUT_VU );
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- snd_soc_update_bits (codec , WM8962_SPKOUTR_VOLUME ,
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- WM8962_SPKOUT_VU , WM8962_SPKOUT_VU );
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- snd_soc_update_bits (codec , WM8962_HPOUTL_VOLUME ,
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- WM8962_HPOUT_VU , WM8962_HPOUT_VU );
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- snd_soc_update_bits (codec , WM8962_HPOUTR_VOLUME ,
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- WM8962_HPOUT_VU , WM8962_HPOUT_VU );
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-
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- /* Stereo control for EQ */
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- snd_soc_update_bits (codec , WM8962_EQ1 , WM8962_EQ_SHARED_COEFF , 0 );
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-
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- /* Don't debouce interrupts so we don't need SYSCLK */
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- snd_soc_update_bits (codec , WM8962_IRQ_DEBOUNCE ,
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- WM8962_FLL_LOCK_DB | WM8962_PLL3_LOCK_DB |
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- WM8962_PLL2_LOCK_DB | WM8962_TEMP_SHUT_DB ,
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- 0 );
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-
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wm8962_add_widgets (codec );
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/* Save boards having to disable DMIC when not in use */
@@ -3506,36 +3435,6 @@ static int wm8962_probe(struct snd_soc_codec *codec)
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wm8962_init_beep (codec );
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wm8962_init_gpio (codec );
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- if (wm8962 -> irq ) {
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- if (pdata -> irq_active_low ) {
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- trigger = IRQF_TRIGGER_LOW ;
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- irq_pol = WM8962_IRQ_POL ;
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- } else {
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- trigger = IRQF_TRIGGER_HIGH ;
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- irq_pol = 0 ;
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- }
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-
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- snd_soc_update_bits (codec , WM8962_INTERRUPT_CONTROL ,
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- WM8962_IRQ_POL , irq_pol );
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-
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- ret = request_threaded_irq (wm8962 -> irq , NULL , wm8962_irq ,
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- trigger | IRQF_ONESHOT ,
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- "wm8962" , codec -> dev );
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- if (ret != 0 ) {
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- dev_err (codec -> dev , "Failed to request IRQ %d: %d\n" ,
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- wm8962 -> irq , ret );
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- wm8962 -> irq = 0 ;
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- /* Non-fatal */
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- } else {
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- /* Enable some IRQs by default */
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- snd_soc_update_bits (codec ,
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- WM8962_INTERRUPT_STATUS_2_MASK ,
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- WM8962_FLL_LOCK_EINT |
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- WM8962_TEMP_SHUT_EINT |
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- WM8962_FIFOS_ERR_EINT , 0 );
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- }
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- }
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-
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return 0 ;
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}
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@@ -3544,9 +3443,6 @@ static int wm8962_remove(struct snd_soc_codec *codec)
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struct wm8962_priv * wm8962 = snd_soc_codec_get_drvdata (codec );
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int i ;
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- if (wm8962 -> irq )
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- free_irq (wm8962 -> irq , codec );
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-
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cancel_delayed_work_sync (& wm8962 -> mic_work );
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wm8962_free_gpio (codec );
@@ -3619,7 +3515,7 @@ static int wm8962_i2c_probe(struct i2c_client *i2c,
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struct wm8962_pdata * pdata = dev_get_platdata (& i2c -> dev );
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struct wm8962_priv * wm8962 ;
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unsigned int reg ;
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- int ret , i ;
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+ int ret , i , irq_pol , trigger ;
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wm8962 = devm_kzalloc (& i2c -> dev , sizeof (struct wm8962_priv ),
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GFP_KERNEL );
@@ -3704,6 +3600,77 @@ static int wm8962_i2c_probe(struct i2c_client *i2c,
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goto err_enable ;
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}
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+ /* SYSCLK defaults to on; make sure it is off so we can safely
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+ * write to registers if the device is declocked.
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+ */
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+ regmap_update_bits (wm8962 -> regmap , WM8962_CLOCKING2 ,
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+ WM8962_SYSCLK_ENA , 0 );
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+
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+ /* Ensure we have soft control over all registers */
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+ regmap_update_bits (wm8962 -> regmap , WM8962_CLOCKING2 ,
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+ WM8962_CLKREG_OVD , WM8962_CLKREG_OVD );
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+
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+ /* Ensure that the oscillator and PLLs are disabled */
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+ regmap_update_bits (wm8962 -> regmap , WM8962_PLL2 ,
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+ WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA ,
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+ 0 );
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+
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+ /* Apply static configuration for GPIOs */
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+ for (i = 0 ; i < ARRAY_SIZE (pdata -> gpio_init ); i ++ )
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+ if (pdata -> gpio_init [i ]) {
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+ wm8962_set_gpio_mode (wm8962 , i + 1 );
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+ regmap_write (wm8962 -> regmap , 0x200 + i ,
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+ pdata -> gpio_init [i ] & 0xffff );
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+ }
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+
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+
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+ /* Put the speakers into mono mode? */
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+ if (pdata -> spk_mono )
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+ regmap_update_bits (wm8962 -> regmap , WM8962_CLASS_D_CONTROL_2 ,
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+ WM8962_SPK_MONO_MASK , WM8962_SPK_MONO );
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+
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+ /* Micbias setup, detection enable and detection
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+ * threasholds. */
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+ if (pdata -> mic_cfg )
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+ regmap_update_bits (wm8962 -> regmap , WM8962_ADDITIONAL_CONTROL_4 ,
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+ WM8962_MICDET_ENA |
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+ WM8962_MICDET_THR_MASK |
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+ WM8962_MICSHORT_THR_MASK |
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+ WM8962_MICBIAS_LVL ,
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+ pdata -> mic_cfg );
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+
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+ /* Latch volume update bits */
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+ regmap_update_bits (wm8962 -> regmap , WM8962_LEFT_INPUT_VOLUME ,
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+ WM8962_IN_VU , WM8962_IN_VU );
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+ regmap_update_bits (wm8962 -> regmap , WM8962_RIGHT_INPUT_VOLUME ,
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+ WM8962_IN_VU , WM8962_IN_VU );
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+ regmap_update_bits (wm8962 -> regmap , WM8962_LEFT_ADC_VOLUME ,
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+ WM8962_ADC_VU , WM8962_ADC_VU );
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+ regmap_update_bits (wm8962 -> regmap , WM8962_RIGHT_ADC_VOLUME ,
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+ WM8962_ADC_VU , WM8962_ADC_VU );
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+ regmap_update_bits (wm8962 -> regmap , WM8962_LEFT_DAC_VOLUME ,
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+ WM8962_DAC_VU , WM8962_DAC_VU );
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+ regmap_update_bits (wm8962 -> regmap , WM8962_RIGHT_DAC_VOLUME ,
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+ WM8962_DAC_VU , WM8962_DAC_VU );
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+ regmap_update_bits (wm8962 -> regmap , WM8962_SPKOUTL_VOLUME ,
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+ WM8962_SPKOUT_VU , WM8962_SPKOUT_VU );
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+ regmap_update_bits (wm8962 -> regmap , WM8962_SPKOUTR_VOLUME ,
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+ WM8962_SPKOUT_VU , WM8962_SPKOUT_VU );
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+ regmap_update_bits (wm8962 -> regmap , WM8962_HPOUTL_VOLUME ,
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+ WM8962_HPOUT_VU , WM8962_HPOUT_VU );
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+ regmap_update_bits (wm8962 -> regmap , WM8962_HPOUTR_VOLUME ,
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+ WM8962_HPOUT_VU , WM8962_HPOUT_VU );
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+
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+ /* Stereo control for EQ */
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+ regmap_update_bits (wm8962 -> regmap , WM8962_EQ1 ,
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+ WM8962_EQ_SHARED_COEFF , 0 );
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+
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+ /* Don't debouce interrupts so we don't need SYSCLK */
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+ regmap_update_bits (wm8962 -> regmap , WM8962_IRQ_DEBOUNCE ,
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+ WM8962_FLL_LOCK_DB | WM8962_PLL3_LOCK_DB |
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+ WM8962_PLL2_LOCK_DB | WM8962_TEMP_SHUT_DB ,
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+ 0 );
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+
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if (wm8962 -> pdata .in4_dc_measure ) {
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ret = regmap_register_patch (wm8962 -> regmap ,
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wm8962_dc_measure ,
@@ -3714,6 +3681,37 @@ static int wm8962_i2c_probe(struct i2c_client *i2c,
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ret );
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}
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+ if (wm8962 -> irq ) {
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+ if (pdata -> irq_active_low ) {
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+ trigger = IRQF_TRIGGER_LOW ;
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+ irq_pol = WM8962_IRQ_POL ;
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+ } else {
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+ trigger = IRQF_TRIGGER_HIGH ;
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+ irq_pol = 0 ;
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+ }
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+
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+ regmap_update_bits (wm8962 -> regmap , WM8962_INTERRUPT_CONTROL ,
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+ WM8962_IRQ_POL , irq_pol );
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+
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+ ret = devm_request_threaded_irq (& i2c -> dev , wm8962 -> irq , NULL ,
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+ wm8962_irq ,
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+ trigger | IRQF_ONESHOT ,
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+ "wm8962" , & i2c -> dev );
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+ if (ret != 0 ) {
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+ dev_err (& i2c -> dev , "Failed to request IRQ %d: %d\n" ,
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+ wm8962 -> irq , ret );
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+ wm8962 -> irq = 0 ;
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+ /* Non-fatal */
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+ } else {
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+ /* Enable some IRQs by default */
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+ regmap_update_bits (wm8962 -> regmap ,
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+ WM8962_INTERRUPT_STATUS_2_MASK ,
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+ WM8962_FLL_LOCK_EINT |
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+ WM8962_TEMP_SHUT_EINT |
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+ WM8962_FIFOS_ERR_EINT , 0 );
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+ }
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+ }
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+
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pm_runtime_enable (& i2c -> dev );
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pm_request_idle (& i2c -> dev );
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