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Merge tag 'iommu-fixes-v5.1-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu fixes from Joerg Roedel: - AMD IOMMU fix for sg-mapping with sg->offset > PAGE_SIZE - Fix for IOVA code to trigger the slow-path less often - Two fixes for Intel VT-d to avoid writing to read-only registers and to flush the right domain id for the default domains in scalable mode * tag 'iommu-fixes-v5.1-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: iommu/vt-d: Save the right domain ID used by hardware iommu/vt-d: Check capability before disabling protected memory iommu/iova: Fix tracking of recently failed iova address iommu/amd: fix sg->dma_address for sg->offset bigger than PAGE_SIZE
2 parents dcacc48 + 84c11e4 commit 070c95d

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lines changed

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+13
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lines changed

drivers/iommu/amd_iommu.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2608,7 +2608,12 @@ static int map_sg(struct device *dev, struct scatterlist *sglist,
26082608

26092609
/* Everything is mapped - write the right values into s->dma_address */
26102610
for_each_sg(sglist, s, nelems, i) {
2611-
s->dma_address += address + s->offset;
2611+
/*
2612+
* Add in the remaining piece of the scatter-gather offset that
2613+
* was masked out when we were determining the physical address
2614+
* via (sg_phys(s) & PAGE_MASK) earlier.
2615+
*/
2616+
s->dma_address += address + (s->offset & ~PAGE_MASK);
26122617
s->dma_length = s->length;
26132618
}
26142619

drivers/iommu/intel-iommu.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1538,6 +1538,9 @@ static void iommu_disable_protect_mem_regions(struct intel_iommu *iommu)
15381538
u32 pmen;
15391539
unsigned long flags;
15401540

1541+
if (!cap_plmr(iommu->cap) && !cap_phmr(iommu->cap))
1542+
return;
1543+
15411544
raw_spin_lock_irqsave(&iommu->register_lock, flags);
15421545
pmen = readl(iommu->reg + DMAR_PMEN_REG);
15431546
pmen &= ~DMA_PMEN_EPM;
@@ -5332,7 +5335,7 @@ int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct intel_svm_dev *sd
53325335

53335336
ctx_lo = context[0].lo;
53345337

5335-
sdev->did = domain->iommu_did[iommu->seq_id];
5338+
sdev->did = FLPT_DEFAULT_DID;
53365339
sdev->sid = PCI_DEVID(info->bus, info->devfn);
53375340

53385341
if (!(ctx_lo & CONTEXT_PASIDE)) {

drivers/iommu/iova.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -207,8 +207,10 @@ static int __alloc_and_insert_iova_range(struct iova_domain *iovad,
207207
curr_iova = rb_entry(curr, struct iova, node);
208208
} while (curr && new_pfn <= curr_iova->pfn_hi);
209209

210-
if (limit_pfn < size || new_pfn < iovad->start_pfn)
210+
if (limit_pfn < size || new_pfn < iovad->start_pfn) {
211+
iovad->max32_alloc_size = size;
211212
goto iova32_full;
213+
}
212214

213215
/* pfn_lo will point to size aligned address if size_aligned is set */
214216
new->pfn_lo = new_pfn;
@@ -222,7 +224,6 @@ static int __alloc_and_insert_iova_range(struct iova_domain *iovad,
222224
return 0;
223225

224226
iova32_full:
225-
iovad->max32_alloc_size = size;
226227
spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags);
227228
return -ENOMEM;
228229
}

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