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28 | 28 |
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29 | 29 | #include "pcie-designware.h"
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30 | 30 |
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31 |
| -#define DRIVER_NAME "keystone-pcie" |
32 |
| - |
33 | 31 | #define PCIE_VENDORID_MASK 0xffff
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34 | 32 | #define PCIE_DEVICEID_SHIFT 16
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35 | 33 |
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36 |
| -/* DEV_STAT_CTRL */ |
37 |
| -#define PCIE_CAP_BASE 0x70 |
38 |
| - |
39 |
| -/* Application register defines */ |
40 |
| -#define LTSSM_EN_VAL BIT(0) |
41 |
| -#define DBI_CS2 BIT(5) |
42 |
| -#define OB_XLAT_EN_VAL BIT(1) |
43 |
| - |
44 | 34 | /* Application registers */
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45 | 35 | #define CMD_STATUS 0x004
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| 36 | +#define LTSSM_EN_VAL BIT(0) |
| 37 | +#define OB_XLAT_EN_VAL BIT(1) |
| 38 | +#define DBI_CS2 BIT(5) |
46 | 39 |
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47 | 40 | #define CFG_SETUP 0x008
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48 | 41 | #define CFG_BUS(x) (((x) & 0xff) << 16)
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70 | 63 | #define IRQ_STATUS 0x184
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71 | 64 | #define MSI_IRQ_OFFSET 4
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72 | 65 |
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73 |
| -/* Error IRQ bits */ |
74 |
| -#define ERR_AER BIT(5) /* ECRC error */ |
75 |
| -#define ERR_AXI BIT(4) /* AXI tag lookup fatal error */ |
76 |
| -#define ERR_CORR BIT(3) /* Correctable error */ |
77 |
| -#define ERR_NONFATAL BIT(2) /* Non-fatal error */ |
78 |
| -#define ERR_FATAL BIT(1) /* Fatal error */ |
79 |
| -#define ERR_SYS BIT(0) /* System (fatal, non-fatal, or correctable) */ |
80 |
| -#define ERR_IRQ_ALL (ERR_AER | ERR_AXI | ERR_CORR | \ |
81 |
| - ERR_NONFATAL | ERR_FATAL | ERR_SYS) |
82 | 66 | #define ERR_IRQ_STATUS 0x1c4
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83 | 67 | #define ERR_IRQ_ENABLE_SET 0x1c8
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84 |
| -#define ERR_IRQ_ENABLE_CLR 0x1cc |
| 68 | +#define ERR_AER BIT(5) /* ECRC error */ |
| 69 | +#define ERR_AXI BIT(4) /* AXI tag lookup fatal error */ |
| 70 | +#define ERR_CORR BIT(3) /* Correctable error */ |
| 71 | +#define ERR_NONFATAL BIT(2) /* Non-fatal error */ |
| 72 | +#define ERR_FATAL BIT(1) /* Fatal error */ |
| 73 | +#define ERR_SYS BIT(0) /* System error */ |
| 74 | +#define ERR_IRQ_ALL (ERR_AER | ERR_AXI | ERR_CORR | \ |
| 75 | + ERR_NONFATAL | ERR_FATAL | ERR_SYS) |
85 | 76 |
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86 | 77 | #define MAX_MSI_HOST_IRQS 8
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87 | 78 | /* PCIE controller device IDs */
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88 |
| -#define PCIE_RC_K2HK 0xb008 |
89 |
| -#define PCIE_RC_K2E 0xb009 |
90 |
| -#define PCIE_RC_K2L 0xb00a |
91 |
| -#define PCIE_RC_K2G 0xb00b |
| 79 | +#define PCIE_RC_K2HK 0xb008 |
| 80 | +#define PCIE_RC_K2E 0xb009 |
| 81 | +#define PCIE_RC_K2L 0xb00a |
| 82 | +#define PCIE_RC_K2G 0xb00b |
92 | 83 |
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93 |
| -#define to_keystone_pcie(x) dev_get_drvdata((x)->dev) |
| 84 | +#define to_keystone_pcie(x) dev_get_drvdata((x)->dev) |
94 | 85 |
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95 | 86 | struct keystone_pcie {
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96 | 87 | struct dw_pcie *pci;
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