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Lan Tianyujoergroedel
Lan Tianyu
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joergroedel
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iommu/hyper-v: Add Hyper-V stub IOMMU driver
On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual processor index is more than 255. IO-APIC interrupt still has 8-bit APIC ID limitation. This patch is to add Hyper-V stub IOMMU driver in order to enable X2APIC mode successfully in Hyper-V Linux guest. The driver returns X2APIC interrupt remapping capability when X2APIC mode is available. Otherwise, it creates a Hyper-V irq domain to limit IO-APIC interrupts' affinity and make sure cpus assigned with IO-APIC interrupt have 8-bit APIC ID. Define 24 IO-APIC remapping entries because Hyper-V only expose one single IO-APIC and one IO-APIC has 24 pins according IO-APIC spec( https://pdos.csail.mit.edu/6.828/2016/readings/ia32/ioapic.pdf). Reviewed-by: Michael Kelley <mikelley@microsoft.com> Signed-off-by: Lan Tianyu <Tianyu.Lan@microsoft.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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‎drivers/iommu/Kconfig

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@@ -435,4 +435,13 @@ config QCOM_IOMMU
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help
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Support for IOMMU on certain Qualcomm SoCs.
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config HYPERV_IOMMU
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bool "Hyper-V x2APIC IRQ Handling"
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depends on HYPERV
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select IOMMU_API
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default HYPERV
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help
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Stub IOMMU driver to handle IRQs as to allow Hyper-V Linux
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guests to run with x2APIC mode enabled.
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endif # IOMMU_SUPPORT

‎drivers/iommu/Makefile

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@@ -32,3 +32,4 @@ obj-$(CONFIG_EXYNOS_IOMMU) += exynos-iommu.o
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obj-$(CONFIG_FSL_PAMU) += fsl_pamu.o fsl_pamu_domain.o
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obj-$(CONFIG_S390_IOMMU) += s390-iommu.o
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obj-$(CONFIG_QCOM_IOMMU) += qcom_iommu.o
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obj-$(CONFIG_HYPERV_IOMMU) += hyperv-iommu.o

‎drivers/iommu/hyperv-iommu.c

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Hyper-V stub IOMMU driver.
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*
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* Copyright (C) 2019, Microsoft, Inc.
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*
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* Author : Lan Tianyu <Tianyu.Lan@microsoft.com>
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*/
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/iommu.h>
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#include <linux/module.h>
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#include <asm/apic.h>
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#include <asm/cpu.h>
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#include <asm/hw_irq.h>
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#include <asm/io_apic.h>
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#include <asm/irq_remapping.h>
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#include <asm/hypervisor.h>
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#include "irq_remapping.h"
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#ifdef CONFIG_IRQ_REMAP
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/*
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* According 82093AA IO-APIC spec , IO APIC has a 24-entry Interrupt
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* Redirection Table. Hyper-V exposes one single IO-APIC and so define
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* 24 IO APIC remmapping entries.
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*/
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#define IOAPIC_REMAPPING_ENTRY 24
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static cpumask_t ioapic_max_cpumask = { CPU_BITS_NONE };
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static struct irq_domain *ioapic_ir_domain;
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static int hyperv_ir_set_affinity(struct irq_data *data,
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const struct cpumask *mask, bool force)
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{
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struct irq_data *parent = data->parent_data;
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struct irq_cfg *cfg = irqd_cfg(data);
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struct IO_APIC_route_entry *entry;
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int ret;
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/* Return error If new irq affinity is out of ioapic_max_cpumask. */
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if (!cpumask_subset(mask, &ioapic_max_cpumask))
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return -EINVAL;
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ret = parent->chip->irq_set_affinity(parent, mask, force);
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if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE)
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return ret;
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entry = data->chip_data;
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entry->dest = cfg->dest_apicid;
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entry->vector = cfg->vector;
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send_cleanup_vector(cfg);
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return 0;
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}
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static struct irq_chip hyperv_ir_chip = {
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.name = "HYPERV-IR",
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.irq_ack = apic_ack_irq,
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.irq_set_affinity = hyperv_ir_set_affinity,
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};
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static int hyperv_irq_remapping_alloc(struct irq_domain *domain,
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unsigned int virq, unsigned int nr_irqs,
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void *arg)
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{
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struct irq_alloc_info *info = arg;
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struct irq_data *irq_data;
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struct irq_desc *desc;
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int ret = 0;
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if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1)
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return -EINVAL;
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ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
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if (ret < 0)
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return ret;
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irq_data = irq_domain_get_irq_data(domain, virq);
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if (!irq_data) {
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irq_domain_free_irqs_common(domain, virq, nr_irqs);
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return -EINVAL;
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}
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irq_data->chip = &hyperv_ir_chip;
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/*
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* If there is interrupt remapping function of IOMMU, setting irq
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* affinity only needs to change IRTE of IOMMU. But Hyper-V doesn't
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* support interrupt remapping function, setting irq affinity of IO-APIC
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* interrupts still needs to change IO-APIC registers. But ioapic_
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* configure_entry() will ignore value of cfg->vector and cfg->
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* dest_apicid when IO-APIC's parent irq domain is not the vector
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* domain.(See ioapic_configure_entry()) In order to setting vector
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* and dest_apicid to IO-APIC register, IO-APIC entry pointer is saved
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* in the chip_data and hyperv_irq_remapping_activate()/hyperv_ir_set_
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* affinity() set vector and dest_apicid directly into IO-APIC entry.
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*/
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irq_data->chip_data = info->ioapic_entry;
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/*
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* Hypver-V IO APIC irq affinity should be in the scope of
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* ioapic_max_cpumask because no irq remapping support.
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*/
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desc = irq_data_to_desc(irq_data);
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cpumask_copy(desc->irq_common_data.affinity, &ioapic_max_cpumask);
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return 0;
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}
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static void hyperv_irq_remapping_free(struct irq_domain *domain,
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unsigned int virq, unsigned int nr_irqs)
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{
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irq_domain_free_irqs_common(domain, virq, nr_irqs);
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}
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static int hyperv_irq_remapping_activate(struct irq_domain *domain,
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struct irq_data *irq_data, bool reserve)
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{
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struct irq_cfg *cfg = irqd_cfg(irq_data);
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struct IO_APIC_route_entry *entry = irq_data->chip_data;
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entry->dest = cfg->dest_apicid;
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entry->vector = cfg->vector;
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return 0;
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}
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static struct irq_domain_ops hyperv_ir_domain_ops = {
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.alloc = hyperv_irq_remapping_alloc,
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.free = hyperv_irq_remapping_free,
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.activate = hyperv_irq_remapping_activate,
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};
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static int __init hyperv_prepare_irq_remapping(void)
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{
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struct fwnode_handle *fn;
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int i;
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if (!hypervisor_is_type(X86_HYPER_MS_HYPERV) ||
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!x2apic_supported())
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return -ENODEV;
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fn = irq_domain_alloc_named_id_fwnode("HYPERV-IR", 0);
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if (!fn)
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return -ENOMEM;
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ioapic_ir_domain =
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irq_domain_create_hierarchy(arch_get_ir_parent_domain(),
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0, IOAPIC_REMAPPING_ENTRY, fn,
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&hyperv_ir_domain_ops, NULL);
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irq_domain_free_fwnode(fn);
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/*
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* Hyper-V doesn't provide irq remapping function for
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* IO-APIC and so IO-APIC only accepts 8-bit APIC ID.
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* Cpu's APIC ID is read from ACPI MADT table and APIC IDs
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* in the MADT table on Hyper-v are sorted monotonic increasingly.
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* APIC ID reflects cpu topology. There maybe some APIC ID
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* gaps when cpu number in a socket is not power of two. Prepare
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* max cpu affinity for IOAPIC irqs. Scan cpu 0-255 and set cpu
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* into ioapic_max_cpumask if its APIC ID is less than 256.
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*/
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for (i = min_t(unsigned int, num_possible_cpus() - 1, 255); i >= 0; i--)
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if (cpu_physical_id(i) < 256)
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cpumask_set_cpu(i, &ioapic_max_cpumask);
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return 0;
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}
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static int __init hyperv_enable_irq_remapping(void)
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{
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return IRQ_REMAP_X2APIC_MODE;
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}
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static struct irq_domain *hyperv_get_ir_irq_domain(struct irq_alloc_info *info)
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{
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if (info->type == X86_IRQ_ALLOC_TYPE_IOAPIC)
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return ioapic_ir_domain;
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else
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return NULL;
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}
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struct irq_remap_ops hyperv_irq_remap_ops = {
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.prepare = hyperv_prepare_irq_remapping,
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.enable = hyperv_enable_irq_remapping,
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.get_ir_irq_domain = hyperv_get_ir_irq_domain,
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};
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#endif

‎drivers/iommu/irq_remapping.c

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@@ -103,6 +103,9 @@ int __init irq_remapping_prepare(void)
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else if (IS_ENABLED(CONFIG_AMD_IOMMU) &&
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amd_iommu_irq_ops.prepare() == 0)
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remap_ops = &amd_iommu_irq_ops;
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else if (IS_ENABLED(CONFIG_HYPERV_IOMMU) &&
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hyperv_irq_remap_ops.prepare() == 0)
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remap_ops = &hyperv_irq_remap_ops;
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else
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return -ENOSYS;
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‎drivers/iommu/irq_remapping.h

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@@ -64,6 +64,7 @@ struct irq_remap_ops {
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extern struct irq_remap_ops intel_irq_remap_ops;
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extern struct irq_remap_ops amd_iommu_irq_ops;
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extern struct irq_remap_ops hyperv_irq_remap_ops;
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#else /* CONFIG_IRQ_REMAP */
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