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douliyangKAGA-KOKO
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x86/tsc: Consolidate init code
Split out suplicated code from tsc_early_init() and tsc_init() into a common helper and fixup some comment typos. [ tglx: Massaged changelog and renamed function ] Signed-off-by: Dou Liyang <douly.fnst@cn.fujitsu.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Pavel Tatashin <pasha.tatashin@oracle.com> Cc: <hpa@zytor.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: "H. Peter Anvin" <hpa@zytor.com> Link: https://lkml.kernel.org/r/20180730075421.22830-2-douly.fnst@cn.fujitsu.com
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arch/x86/kernel/tsc.c

Lines changed: 12 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -182,7 +182,7 @@ static void __init cyc2ns_init_boot_cpu(void)
182182
}
183183

184184
/*
185-
* Secondary CPUs do not run through cyc2ns_init(), so set up
185+
* Secondary CPUs do not run through tsc_init(), so set up
186186
* all the scale factors for all CPUs, assuming the same
187187
* speed as the bootup CPU. (cpufreq notifiers will fix this
188188
* up if their speed diverges)
@@ -1389,7 +1389,7 @@ static bool __init determine_cpu_tsc_frequencies(bool early)
13891389
}
13901390

13911391
/*
1392-
* Trust non-zero tsc_khz as authorative,
1392+
* Trust non-zero tsc_khz as authoritative,
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* and use it to sanity check cpu_khz,
13941394
* which will be off if system timer is off.
13951395
*/
@@ -1421,6 +1421,14 @@ static unsigned long __init get_loops_per_jiffy(void)
14211421
return lpj;
14221422
}
14231423

1424+
static void __init tsc_enable_sched_clock(void)
1425+
{
1426+
/* Sanitize TSC ADJUST before cyc2ns gets initialized */
1427+
tsc_store_and_check_tsc_adjust(true);
1428+
cyc2ns_init_boot_cpu();
1429+
static_branch_enable(&__use_tsc);
1430+
}
1431+
14241432
void __init tsc_early_init(void)
14251433
{
14261434
if (!boot_cpu_has(X86_FEATURE_TSC))
@@ -1429,10 +1437,7 @@ void __init tsc_early_init(void)
14291437
return;
14301438
loops_per_jiffy = get_loops_per_jiffy();
14311439

1432-
/* Sanitize TSC ADJUST before cyc2ns gets initialized */
1433-
tsc_store_and_check_tsc_adjust(true);
1434-
cyc2ns_init_boot_cpu();
1435-
static_branch_enable(&__use_tsc);
1440+
tsc_enable_sched_clock();
14361441
}
14371442

14381443
void __init tsc_init(void)
@@ -1456,13 +1461,10 @@ void __init tsc_init(void)
14561461
setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER);
14571462
return;
14581463
}
1459-
/* Sanitize TSC ADJUST before cyc2ns gets initialized */
1460-
tsc_store_and_check_tsc_adjust(true);
1461-
cyc2ns_init_boot_cpu();
1464+
tsc_enable_sched_clock();
14621465
}
14631466

14641467
cyc2ns_init_secondary_cpus();
1465-
static_branch_enable(&__use_tsc);
14661468

14671469
if (!no_sched_irq_time)
14681470
enable_sched_clock_irqtime();

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