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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann: "This week is a much smaller update, containing fixes only for TI OMAP, NXP i.MX and Rockchips platforms: omap: - omap4 had problems with lost timer interrupts - another IRQ handling issue with OMAP5 - A workaround for a regression in the pwm-omap-dmtimer driver NXP i.MX: - eMMC was broken on the new imx8mq-evk board Rockchip: - a fix for new dtc graph warnings and a regulator fix for rock64 - USB support broke on rk3328-rock64" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: OMAP2+: fix lack of timer interrupts on CPU1 after hotplug arm64: dts: imx8mq: Fix boot from eMMC ARM: OMAP2+: Variable "reg" in function omap4_dsi_mux_pads() could be uninitialized ARM: dts: Configure clock parent for pwm vibra bus: ti-sysc: Fix timer handling with drop pm_runtime_irq_safe() arm64: dts: rockchip: enable usb-host regulators at boot on rk3328-rock64 arm64: dts: rockchip: fix graph_port warning on rk3399 bob kevin and excavator ARM: OMAP5+: Fix inverted nirq pin interrupts with irq_set_type clocksource: timer-ti-dm: Fix pwm dmtimer usage of fck reparenting ARM: dts: rockchip: remove qos_cif1 from rk3188 power-domain
2 parents 88fe73c + 410d736 commit 64c0133

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15 files changed

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-48
lines changed

15 files changed

+109
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lines changed

‎arch/arm/boot/dts/omap4-droid4-xt894.dts

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -644,6 +644,17 @@
644644
};
645645
};
646646

647+
/* Configure pwm clock source for timers 8 & 9 */
648+
&timer8 {
649+
assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
650+
assigned-clock-parents = <&sys_clkin_ck>;
651+
};
652+
653+
&timer9 {
654+
assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
655+
assigned-clock-parents = <&sys_clkin_ck>;
656+
};
657+
647658
/*
648659
* As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
649660
* uart1 wakeirq.

‎arch/arm/boot/dts/omap5-board-common.dtsi

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -317,7 +317,8 @@
317317

318318
palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
319319
pinctrl-single,pins = <
320-
OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */
320+
/* sys_nirq1 is pulled down as the SoC is inverting it for GIC */
321+
OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0)
321322
>;
322323
};
323324

@@ -385,7 +386,8 @@
385386

386387
palmas: palmas@48 {
387388
compatible = "ti,palmas";
388-
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
389+
/* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
390+
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
389391
reg = <0x48>;
390392
interrupt-controller;
391393
#interrupt-cells = <2>;
@@ -651,7 +653,8 @@
651653
pinctrl-names = "default";
652654
pinctrl-0 = <&twl6040_pins>;
653655

654-
interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */
656+
/* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
657+
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_LOW>;
655658

656659
/* audpwron gpio defined in the board specific dts */
657660

‎arch/arm/boot/dts/omap5-cm-t54.dts

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -181,6 +181,13 @@
181181
OMAP5_IOPAD(0x0042, PIN_INPUT_PULLDOWN | MUX_MODE6) /* llib_wakereqin.gpio1_wk15 */
182182
>;
183183
};
184+
185+
palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
186+
pinctrl-single,pins = <
187+
/* sys_nirq1 is pulled down as the SoC is inverting it for GIC */
188+
OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0)
189+
>;
190+
};
184191
};
185192

186193
&omap5_pmx_core {
@@ -414,8 +421,11 @@
414421

415422
palmas: palmas@48 {
416423
compatible = "ti,palmas";
417-
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
418424
reg = <0x48>;
425+
pinctrl-0 = <&palmas_sys_nirq_pins>;
426+
pinctrl-names = "default";
427+
/* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
428+
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
419429
interrupt-controller;
420430
#interrupt-cells = <2>;
421431
ti,system-power-controller;

‎arch/arm/boot/dts/rk3188.dtsi

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -719,7 +719,6 @@
719719
pm_qos = <&qos_lcdc0>,
720720
<&qos_lcdc1>,
721721
<&qos_cif0>,
722-
<&qos_cif1>,
723722
<&qos_ipp>,
724723
<&qos_rga>;
725724
};

‎arch/arm/mach-omap2/cpuidle44xx.c

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -152,6 +152,10 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
152152
mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
153153
(cx->mpu_logic_state == PWRDM_POWER_OFF);
154154

155+
/* Enter broadcast mode for periodic timers */
156+
tick_broadcast_enable();
157+
158+
/* Enter broadcast mode for one-shot timers */
155159
tick_broadcast_enter();
156160

157161
/*
@@ -218,15 +222,6 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
218222
return index;
219223
}
220224

221-
/*
222-
* For each cpu, setup the broadcast timer because local timers
223-
* stops for the states above C1.
224-
*/
225-
static void omap_setup_broadcast_timer(void *arg)
226-
{
227-
tick_broadcast_enable();
228-
}
229-
230225
static struct cpuidle_driver omap4_idle_driver = {
231226
.name = "omap4_idle",
232227
.owner = THIS_MODULE,
@@ -319,8 +314,5 @@ int __init omap4_idle_init(void)
319314
if (!cpu_clkdm[0] || !cpu_clkdm[1])
320315
return -ENODEV;
321316

322-
/* Configure the broadcast timer on each cpu */
323-
on_each_cpu(omap_setup_broadcast_timer, NULL, 1);
324-
325317
return cpuidle_register(idle_driver, cpu_online_mask);
326318
}

‎arch/arm/mach-omap2/display.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -83,6 +83,7 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
8383
u32 enable_mask, enable_shift;
8484
u32 pipd_mask, pipd_shift;
8585
u32 reg;
86+
int ret;
8687

8788
if (dsi_id == 0) {
8889
enable_mask = OMAP4_DSI1_LANEENABLE_MASK;
@@ -98,7 +99,11 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
9899
return -ENODEV;
99100
}
100101

101-
regmap_read(omap4_dsi_mux_syscon, OMAP4_DSIPHY_SYSCON_OFFSET, &reg);
102+
ret = regmap_read(omap4_dsi_mux_syscon,
103+
OMAP4_DSIPHY_SYSCON_OFFSET,
104+
&reg);
105+
if (ret)
106+
return ret;
102107

103108
reg &= ~enable_mask;
104109
reg &= ~pipd_mask;

‎arch/arm/mach-omap2/omap-wakeupgen.c

Lines changed: 35 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,9 @@
5050
#define OMAP4_NR_BANKS 4
5151
#define OMAP4_NR_IRQS 128
5252

53+
#define SYS_NIRQ1_EXT_SYS_IRQ_1 7
54+
#define SYS_NIRQ2_EXT_SYS_IRQ_2 119
55+
5356
static void __iomem *wakeupgen_base;
5457
static void __iomem *sar_base;
5558
static DEFINE_RAW_SPINLOCK(wakeupgen_lock);
@@ -153,6 +156,37 @@ static void wakeupgen_unmask(struct irq_data *d)
153156
irq_chip_unmask_parent(d);
154157
}
155158

159+
/*
160+
* The sys_nirq pins bypass peripheral modules and are wired directly
161+
* to MPUSS wakeupgen. They get automatically inverted for GIC.
162+
*/
163+
static int wakeupgen_irq_set_type(struct irq_data *d, unsigned int type)
164+
{
165+
bool inverted = false;
166+
167+
switch (type) {
168+
case IRQ_TYPE_LEVEL_LOW:
169+
type &= ~IRQ_TYPE_LEVEL_MASK;
170+
type |= IRQ_TYPE_LEVEL_HIGH;
171+
inverted = true;
172+
break;
173+
case IRQ_TYPE_EDGE_FALLING:
174+
type &= ~IRQ_TYPE_EDGE_BOTH;
175+
type |= IRQ_TYPE_EDGE_RISING;
176+
inverted = true;
177+
break;
178+
default:
179+
break;
180+
}
181+
182+
if (inverted && d->hwirq != SYS_NIRQ1_EXT_SYS_IRQ_1 &&
183+
d->hwirq != SYS_NIRQ2_EXT_SYS_IRQ_2)
184+
pr_warn("wakeupgen: irq%li polarity inverted in dts\n",
185+
d->hwirq);
186+
187+
return irq_chip_set_type_parent(d, type);
188+
}
189+
156190
#ifdef CONFIG_HOTPLUG_CPU
157191
static DEFINE_PER_CPU(u32 [MAX_NR_REG_BANKS], irqmasks);
158192

@@ -446,7 +480,7 @@ static struct irq_chip wakeupgen_chip = {
446480
.irq_mask = wakeupgen_mask,
447481
.irq_unmask = wakeupgen_unmask,
448482
.irq_retrigger = irq_chip_retrigger_hierarchy,
449-
.irq_set_type = irq_chip_set_type_parent,
483+
.irq_set_type = wakeupgen_irq_set_type,
450484
.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND,
451485
#ifdef CONFIG_SMP
452486
.irq_set_affinity = irq_chip_set_affinity_parent,

‎arch/arm64/boot/dts/freescale/imx8mq-evk.dts

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -227,34 +227,34 @@
227227

228228
pinctrl_usdhc1_100mhz: usdhc1-100grp {
229229
fsl,pins = <
230-
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x85
231-
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc5
232-
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc5
233-
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc5
234-
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc5
235-
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc5
236-
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc5
237-
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc5
238-
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc5
239-
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc5
240-
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x85
230+
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d
231+
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd
232+
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd
233+
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd
234+
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd
235+
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd
236+
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd
237+
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd
238+
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd
239+
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd
240+
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d
241241
MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
242242
>;
243243
};
244244

245245
pinctrl_usdhc1_200mhz: usdhc1-200grp {
246246
fsl,pins = <
247-
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x87
248-
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc7
249-
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc7
250-
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc7
251-
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc7
252-
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc7
253-
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc7
254-
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc7
255-
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc7
256-
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc7
257-
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x87
247+
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f
248+
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf
249+
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf
250+
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf
251+
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf
252+
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf
253+
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf
254+
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf
255+
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf
256+
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf
257+
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f
258258
MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
259259
>;
260260
};

‎arch/arm64/boot/dts/freescale/imx8mq.dtsi

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -360,6 +360,8 @@
360360
<&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
361361
<&clk IMX8MQ_CLK_USDHC1_ROOT>;
362362
clock-names = "ipg", "ahb", "per";
363+
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
364+
assigned-clock-rates = <400000000>;
363365
fsl,tuning-start-tap = <20>;
364366
fsl,tuning-step = <2>;
365367
bus-width = <4>;

‎arch/arm64/boot/dts/rockchip/rk3328-rock64.dts

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,7 @@
4040
pinctrl-0 = <&usb30_host_drv>;
4141
regulator-name = "vcc_host_5v";
4242
regulator-always-on;
43+
regulator-boot-on;
4344
vin-supply = <&vcc_sys>;
4445
};
4546

@@ -51,6 +52,7 @@
5152
pinctrl-0 = <&usb20_host_drv>;
5253
regulator-name = "vcc_host1_5v";
5354
regulator-always-on;
55+
regulator-boot-on;
5456
vin-supply = <&vcc_sys>;
5557
};
5658

‎arch/arm64/boot/dts/rockchip/rk3399-gru-bob.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@
2222
backlight = <&backlight>;
2323
power-supply = <&pp3300_disp>;
2424

25-
ports {
25+
port {
2626
panel_in_edp: endpoint {
2727
remote-endpoint = <&edp_out_panel>;
2828
};

‎arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@
4343
backlight = <&backlight>;
4444
power-supply = <&pp3300_disp>;
4545

46-
ports {
46+
port {
4747
panel_in_edp: endpoint {
4848
remote-endpoint = <&edp_out_panel>;
4949
};

‎arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@
9191
pinctrl-0 = <&lcd_panel_reset>;
9292
power-supply = <&vcc3v3_s0>;
9393

94-
ports {
94+
port {
9595
panel_in_edp: endpoint {
9696
remote-endpoint = <&edp_out_panel>;
9797
};

‎drivers/bus/ti-sysc.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -781,12 +781,12 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
781781
SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff,
782782
SYSC_QUIRK_LEGACY_IDLE),
783783
SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
784-
SYSC_QUIRK_LEGACY_IDLE),
784+
0),
785785
/* Some timers on omap4 and later */
786786
SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x50002100, 0xffffffff,
787-
SYSC_QUIRK_LEGACY_IDLE),
787+
0),
788788
SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffff00ff,
789-
SYSC_QUIRK_LEGACY_IDLE),
789+
0),
790790
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
791791
SYSC_QUIRK_LEGACY_IDLE),
792792
/* Uarts on omap4 and later */

‎drivers/clocksource/timer-ti-dm.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -154,6 +154,10 @@ static int omap_dm_timer_of_set_source(struct omap_dm_timer *timer)
154154
if (IS_ERR(parent))
155155
return -ENODEV;
156156

157+
/* Bail out if both clocks point to fck */
158+
if (clk_is_match(parent, timer->fclk))
159+
return 0;
160+
157161
ret = clk_set_parent(timer->fclk, parent);
158162
if (ret < 0)
159163
pr_err("%s: failed to set parent\n", __func__);
@@ -864,7 +868,6 @@ static int omap_dm_timer_probe(struct platform_device *pdev)
864868
timer->pdev = pdev;
865869

866870
pm_runtime_enable(dev);
867-
pm_runtime_irq_safe(dev);
868871

869872
if (!timer->reserved) {
870873
ret = pm_runtime_get_sync(dev);

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