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torvaldstorvalds
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Merge tag 'hwlock-v4.21' of git://github.com/andersson/remoteproc
Pull hwspinlock updates from Bjorn Andersson: "This adds support for the hardware semaphores found in STM32MP1" * tag 'hwlock-v4.21' of git://github.com/andersson/remoteproc: hwspinlock: fix return value check in stm32_hwspinlock_probe() hwspinlock: add STM32 hwspinlock device dt-bindings: hwlock: Document STM32 hwspinlock bindings
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‎Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt

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STM32 Hardware Spinlock Device Binding
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-------------------------------------
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Required properties :
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- compatible : should be "st,stm32-hwspinlock".
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- reg : the register address of hwspinlock.
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- #hwlock-cells : hwlock users only use the hwlock id to represent a specific
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hwlock, so the number of cells should be <1> here.
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- clock-names : Must contain "hsem".
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- clocks : Must contain a phandle entry for the clock in clock-names, see the
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common clock bindings.
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Please look at the generic hwlock binding for usage information for consumers,
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"Documentation/devicetree/bindings/hwlock/hwlock.txt"
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Example of hwlock provider:
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hwspinlock@4c000000 {
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compatible = "st,stm32-hwspinlock";
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#hwlock-cells = <1>;
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reg = <0x4c000000 0x400>;
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clocks = <&rcc HSEM>;
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clock-names = "hsem";
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};

‎drivers/hwspinlock/Kconfig

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@@ -49,6 +49,15 @@ config HWSPINLOCK_SPRD
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If unsure, say N.
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config HWSPINLOCK_STM32
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tristate "STM32 Hardware Spinlock device"
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depends on MACH_STM32MP157
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depends on HWSPINLOCK
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help
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Say y here to support the STM32 Hardware Spinlock device.
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If unsure, say N.
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config HSEM_U8500
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tristate "STE Hardware Semaphore functionality"
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depends on HWSPINLOCK

‎drivers/hwspinlock/Makefile

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@@ -8,4 +8,5 @@ obj-$(CONFIG_HWSPINLOCK_OMAP) += omap_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_QCOM) += qcom_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_SIRF) += sirf_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_SPRD) += sprd_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_STM32) += stm32_hwspinlock.o
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obj-$(CONFIG_HSEM_U8500) += u8500_hsem.o

‎drivers/hwspinlock/stm32_hwspinlock.c

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) STMicroelectronics SA 2018
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* Author: Benjamin Gaignard <benjamin.gaignard@st.com> for STMicroelectronics.
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*/
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#include <linux/clk.h>
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#include <linux/hwspinlock.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include "hwspinlock_internal.h"
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#define STM32_MUTEX_COREID BIT(8)
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#define STM32_MUTEX_LOCK_BIT BIT(31)
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#define STM32_MUTEX_NUM_LOCKS 32
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struct stm32_hwspinlock {
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struct clk *clk;
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struct hwspinlock_device bank;
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};
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static int stm32_hwspinlock_trylock(struct hwspinlock *lock)
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{
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void __iomem *lock_addr = lock->priv;
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u32 status;
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writel(STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID, lock_addr);
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status = readl(lock_addr);
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return status == (STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID);
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}
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static void stm32_hwspinlock_unlock(struct hwspinlock *lock)
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{
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void __iomem *lock_addr = lock->priv;
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writel(STM32_MUTEX_COREID, lock_addr);
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}
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static const struct hwspinlock_ops stm32_hwspinlock_ops = {
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.trylock = stm32_hwspinlock_trylock,
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.unlock = stm32_hwspinlock_unlock,
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};
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static int stm32_hwspinlock_probe(struct platform_device *pdev)
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{
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struct stm32_hwspinlock *hw;
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void __iomem *io_base;
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struct resource *res;
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size_t array_size;
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int i, ret;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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io_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(io_base))
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return PTR_ERR(io_base);
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array_size = STM32_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock);
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hw = devm_kzalloc(&pdev->dev, sizeof(*hw) + array_size, GFP_KERNEL);
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if (!hw)
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return -ENOMEM;
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hw->clk = devm_clk_get(&pdev->dev, "hsem");
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if (IS_ERR(hw->clk))
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return PTR_ERR(hw->clk);
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for (i = 0; i < STM32_MUTEX_NUM_LOCKS; i++)
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hw->bank.lock[i].priv = io_base + i * sizeof(u32);
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platform_set_drvdata(pdev, hw);
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pm_runtime_enable(&pdev->dev);
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ret = hwspin_lock_register(&hw->bank, &pdev->dev, &stm32_hwspinlock_ops,
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0, STM32_MUTEX_NUM_LOCKS);
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if (ret)
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pm_runtime_disable(&pdev->dev);
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return ret;
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}
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static int stm32_hwspinlock_remove(struct platform_device *pdev)
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{
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struct stm32_hwspinlock *hw = platform_get_drvdata(pdev);
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int ret;
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ret = hwspin_lock_unregister(&hw->bank);
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if (ret)
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dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
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pm_runtime_disable(&pdev->dev);
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return 0;
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}
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static int __maybe_unused stm32_hwspinlock_runtime_suspend(struct device *dev)
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{
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struct stm32_hwspinlock *hw = dev_get_drvdata(dev);
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clk_disable_unprepare(hw->clk);
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return 0;
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}
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static int __maybe_unused stm32_hwspinlock_runtime_resume(struct device *dev)
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{
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struct stm32_hwspinlock *hw = dev_get_drvdata(dev);
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clk_prepare_enable(hw->clk);
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return 0;
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}
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static const struct dev_pm_ops stm32_hwspinlock_pm_ops = {
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SET_RUNTIME_PM_OPS(stm32_hwspinlock_runtime_suspend,
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stm32_hwspinlock_runtime_resume,
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NULL)
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};
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static const struct of_device_id stm32_hwpinlock_ids[] = {
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{ .compatible = "st,stm32-hwspinlock", },
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{},
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};
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MODULE_DEVICE_TABLE(of, stm32_hwpinlock_ids);
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static struct platform_driver stm32_hwspinlock_driver = {
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.probe = stm32_hwspinlock_probe,
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.remove = stm32_hwspinlock_remove,
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.driver = {
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.name = "stm32_hwspinlock",
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.of_match_table = stm32_hwpinlock_ids,
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.pm = &stm32_hwspinlock_pm_ops,
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},
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};
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static int __init stm32_hwspinlock_init(void)
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{
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return platform_driver_register(&stm32_hwspinlock_driver);
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}
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/* board init code might need to reserve hwspinlocks for predefined purposes */
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postcore_initcall(stm32_hwspinlock_init);
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static void __exit stm32_hwspinlock_exit(void)
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{
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platform_driver_unregister(&stm32_hwspinlock_driver);
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}
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module_exit(stm32_hwspinlock_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Hardware spinlock driver for STM32 SoCs");
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MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");

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