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torvaldstorvalds
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Merge tag 'drm-fixes-2019-02-22' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie: "This contains a single i915 tiled display fix, and a set of amdgpu/radeon fixes. i915: - tiled display fix amdgpu/radeon: - runtime PM fix - bulk moves disable (fix is too large for 5.0) - a set of display fixes that are all cc'ed stable so we didn't want to leave them until -next" * tag 'drm-fixes-2019-02-22' of git://anongit.freedesktop.org/drm/drm: drm/amdgpu: disable bulk moves for now drm/amd/display: set clocks to 0 on suspend on dce80 drm/amd/display: fix optimize_bandwidth func pointer for dce80 drm/amd/display: Fix negative cursor pos programming drm/i915/fbdev: Actually configure untiled displays drm/amd/display: Raise dispclk value for dce11 drm/amd/display: Fix MST reboot/poweroff sequence drm/amdgpu: Update sdma golden setting for vega20 drm/amdgpu: Set DPM_FLAG_NEVER_SKIP when enabling PM-runtime gpu: drm: radeon: Set DPM_FLAG_NEVER_SKIP when enabling PM-runtime
2 parents 168bd29 + 019276e commit 6ee2846

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-18
lines changed

11 files changed

+47
-18
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -212,6 +212,7 @@ int amdgpu_driver_load_kms(struct drm_device *dev, unsigned long flags)
212212
}
213213

214214
if (amdgpu_device_is_px(dev)) {
215+
dev_pm_set_driver_flags(dev->dev, DPM_FLAG_NEVER_SKIP);
215216
pm_runtime_use_autosuspend(dev->dev);
216217
pm_runtime_set_autosuspend_delay(dev->dev, 5000);
217218
pm_runtime_set_active(dev->dev);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -638,12 +638,14 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev,
638638
struct ttm_bo_global *glob = adev->mman.bdev.glob;
639639
struct amdgpu_vm_bo_base *bo_base;
640640

641+
#if 0
641642
if (vm->bulk_moveable) {
642643
spin_lock(&glob->lru_lock);
643644
ttm_bo_bulk_move_lru_tail(&vm->lru_bulk_move);
644645
spin_unlock(&glob->lru_lock);
645646
return;
646647
}
648+
#endif
647649

648650
memset(&vm->lru_bulk_move, 0, sizeof(vm->lru_bulk_move));
649651

‎drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -128,7 +128,7 @@ static const struct soc15_reg_golden golden_settings_sdma0_4_2_init[] = {
128128

129129
static const struct soc15_reg_golden golden_settings_sdma0_4_2[] =
130130
{
131-
SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_CHICKEN_BITS, 0xfe931f07, 0x02831d07),
131+
SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_CHICKEN_BITS, 0xfe931f07, 0x02831f07),
132132
SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_CLK_CTRL, 0xffffffff, 0x3f000100),
133133
SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GB_ADDR_CONFIG, 0x0000773f, 0x00004002),
134134
SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GB_ADDR_CONFIG_READ, 0x0000773f, 0x00004002),
@@ -158,7 +158,7 @@ static const struct soc15_reg_golden golden_settings_sdma0_4_2[] =
158158
};
159159

160160
static const struct soc15_reg_golden golden_settings_sdma1_4_2[] = {
161-
SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CHICKEN_BITS, 0xfe931f07, 0x02831d07),
161+
SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CHICKEN_BITS, 0xfe931f07, 0x02831f07),
162162
SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CLK_CTRL, 0xffffffff, 0x3f000100),
163163
SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG, 0x0000773f, 0x00004002),
164164
SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG_READ, 0x0000773f, 0x00004002),

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -786,12 +786,13 @@ static int dm_suspend(void *handle)
786786
struct amdgpu_display_manager *dm = &adev->dm;
787787
int ret = 0;
788788

789+
WARN_ON(adev->dm.cached_state);
790+
adev->dm.cached_state = drm_atomic_helper_suspend(adev->ddev);
791+
789792
s3_handle_mst(adev->ddev, true);
790793

791794
amdgpu_dm_irq_suspend(adev);
792795

793-
WARN_ON(adev->dm.cached_state);
794-
adev->dm.cached_state = drm_atomic_helper_suspend(adev->ddev);
795796

796797
dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3);
797798

‎drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -662,6 +662,11 @@ static void dce11_update_clocks(struct clk_mgr *clk_mgr,
662662
{
663663
struct dce_clk_mgr *clk_mgr_dce = TO_DCE_CLK_MGR(clk_mgr);
664664
struct dm_pp_power_level_change_request level_change_req;
665+
int patched_disp_clk = context->bw.dce.dispclk_khz;
666+
667+
/*TODO: W/A for dal3 linux, investigate why this works */
668+
if (!clk_mgr_dce->dfs_bypass_active)
669+
patched_disp_clk = patched_disp_clk * 115 / 100;
665670

666671
level_change_req.power_level = dce_get_required_clocks_state(clk_mgr, context);
667672
/* get max clock state from PPLIB */
@@ -671,9 +676,9 @@ static void dce11_update_clocks(struct clk_mgr *clk_mgr,
671676
clk_mgr_dce->cur_min_clks_state = level_change_req.power_level;
672677
}
673678

674-
if (should_set_clock(safe_to_lower, context->bw.dce.dispclk_khz, clk_mgr->clks.dispclk_khz)) {
675-
context->bw.dce.dispclk_khz = dce_set_clock(clk_mgr, context->bw.dce.dispclk_khz);
676-
clk_mgr->clks.dispclk_khz = context->bw.dce.dispclk_khz;
679+
if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) {
680+
context->bw.dce.dispclk_khz = dce_set_clock(clk_mgr, patched_disp_clk);
681+
clk_mgr->clks.dispclk_khz = patched_disp_clk;
677682
}
678683
dce11_pplib_apply_display_requirements(clk_mgr->ctx->dc, context);
679684
}

‎drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,10 @@ void dce100_prepare_bandwidth(
3737
struct dc *dc,
3838
struct dc_state *context);
3939

40+
void dce100_optimize_bandwidth(
41+
struct dc *dc,
42+
struct dc_state *context);
43+
4044
bool dce100_enable_display_power_gating(struct dc *dc, uint8_t controller_id,
4145
struct dc_bios *dcb,
4246
enum pipe_gating_control power_gating);

‎drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -77,6 +77,6 @@ void dce80_hw_sequencer_construct(struct dc *dc)
7777
dc->hwss.enable_display_power_gating = dce100_enable_display_power_gating;
7878
dc->hwss.pipe_control_lock = dce_pipe_control_lock;
7979
dc->hwss.prepare_bandwidth = dce100_prepare_bandwidth;
80-
dc->hwss.optimize_bandwidth = dce100_prepare_bandwidth;
80+
dc->hwss.optimize_bandwidth = dce100_optimize_bandwidth;
8181
}
8282

‎drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c

Lines changed: 16 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -790,9 +790,22 @@ bool dce80_validate_bandwidth(
790790
struct dc *dc,
791791
struct dc_state *context)
792792
{
793-
/* TODO implement when needed but for now hardcode max value*/
794-
context->bw.dce.dispclk_khz = 681000;
795-
context->bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER_CZ;
793+
int i;
794+
bool at_least_one_pipe = false;
795+
796+
for (i = 0; i < dc->res_pool->pipe_count; i++) {
797+
if (context->res_ctx.pipe_ctx[i].stream)
798+
at_least_one_pipe = true;
799+
}
800+
801+
if (at_least_one_pipe) {
802+
/* TODO implement when needed but for now hardcode max value*/
803+
context->bw.dce.dispclk_khz = 681000;
804+
context->bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER_CZ;
805+
} else {
806+
context->bw.dce.dispclk_khz = 0;
807+
context->bw.dce.yclk_khz = 0;
808+
}
796809

797810
return true;
798811
}

‎drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2658,8 +2658,8 @@ static void dcn10_set_cursor_position(struct pipe_ctx *pipe_ctx)
26582658
.mirror = pipe_ctx->plane_state->horizontal_mirror
26592659
};
26602660

2661-
pos_cpy.x -= pipe_ctx->plane_state->dst_rect.x;
2662-
pos_cpy.y -= pipe_ctx->plane_state->dst_rect.y;
2661+
pos_cpy.x_hotspot += pipe_ctx->plane_state->dst_rect.x;
2662+
pos_cpy.y_hotspot += pipe_ctx->plane_state->dst_rect.y;
26632663

26642664
if (pipe_ctx->plane_state->address.type
26652665
== PLN_ADDR_TYPE_VIDEO_PROGRESSIVE)

‎drivers/gpu/drm/i915/intel_fbdev.c

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -336,8 +336,8 @@ static bool intel_fb_initial_config(struct drm_fb_helper *fb_helper,
336336
bool *enabled, int width, int height)
337337
{
338338
struct drm_i915_private *dev_priv = to_i915(fb_helper->dev);
339-
unsigned long conn_configured, conn_seq, mask;
340339
unsigned int count = min(fb_helper->connector_count, BITS_PER_LONG);
340+
unsigned long conn_configured, conn_seq;
341341
int i, j;
342342
bool *save_enabled;
343343
bool fallback = true, ret = true;
@@ -355,10 +355,9 @@ static bool intel_fb_initial_config(struct drm_fb_helper *fb_helper,
355355
drm_modeset_backoff(&ctx);
356356

357357
memcpy(save_enabled, enabled, count);
358-
mask = GENMASK(count - 1, 0);
358+
conn_seq = GENMASK(count - 1, 0);
359359
conn_configured = 0;
360360
retry:
361-
conn_seq = conn_configured;
362361
for (i = 0; i < count; i++) {
363362
struct drm_fb_helper_connector *fb_conn;
364363
struct drm_connector *connector;
@@ -371,7 +370,8 @@ static bool intel_fb_initial_config(struct drm_fb_helper *fb_helper,
371370
if (conn_configured & BIT(i))
372371
continue;
373372

374-
if (conn_seq == 0 && !connector->has_tile)
373+
/* First pass, only consider tiled connectors */
374+
if (conn_seq == GENMASK(count - 1, 0) && !connector->has_tile)
375375
continue;
376376

377377
if (connector->status == connector_status_connected)
@@ -475,8 +475,10 @@ static bool intel_fb_initial_config(struct drm_fb_helper *fb_helper,
475475
conn_configured |= BIT(i);
476476
}
477477

478-
if ((conn_configured & mask) != mask && conn_configured != conn_seq)
478+
if (conn_configured != conn_seq) { /* repeat until no more are found */
479+
conn_seq = conn_configured;
479480
goto retry;
481+
}
480482

481483
/*
482484
* If the BIOS didn't enable everything it could, fall back to have the

‎drivers/gpu/drm/radeon/radeon_kms.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -172,6 +172,7 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
172172
}
173173

174174
if (radeon_is_px(dev)) {
175+
dev_pm_set_driver_flags(dev->dev, DPM_FLAG_NEVER_SKIP);
175176
pm_runtime_use_autosuspend(dev->dev);
176177
pm_runtime_set_autosuspend_delay(dev->dev, 5000);
177178
pm_runtime_set_active(dev->dev);

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