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Eugeniy Paltsevvineetgarc
Eugeniy Paltsev
authored and
vineetgarc
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ARCv2: Add explcit unaligned access support (and ability to disable too)
As of today we enable unaligned access unconditionally on ARCv2. Do this under a Kconfig option to allow disable it for test, benchmarking etc. Also while at it - Select HAVE_EFFICIENT_UNALIGNED_ACCESS - Although gcc defaults to unaligned access (since GNU 2018.03), add the right toggles for enabling or disabling as appropriate - update bootlog to prints both HW feature status (exists, enabled/disabled) and SW status (used / not used). - wire up the relaxed memcpy for unaligned access Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> [vgupta: squashed patches, handle gcc -mno-unaligned-access quick]
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‎arch/arc/Kconfig

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -386,6 +386,15 @@ config ARC_HAS_SWAPE
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387387
if ISA_ARCV2
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389+
config ARC_USE_UNALIGNED_MEM_ACCESS
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bool "Enable unaligned access in HW"
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default y
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select HAVE_EFFICIENT_UNALIGNED_ACCESS
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help
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The ARC HS architecture supports unaligned memory access
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which is disabled by default. Enable unaligned access in
396+
hardware and use software to use it
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389398
config ARC_HAS_LL64
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bool "Insn: 64bit LDD/STD"
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help

‎arch/arc/Makefile

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Original file line numberDiff line numberDiff line change
@@ -28,6 +28,12 @@ cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape
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ifdef CONFIG_ISA_ARCV2
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ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
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cflags-y += -munaligned-access
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else
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cflags-y += -mno-unaligned-access
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endif
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ifndef CONFIG_ARC_HAS_LL64
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cflags-y += -mno-ll64
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endif

‎arch/arc/include/asm/arcregs.h

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Original file line numberDiff line numberDiff line change
@@ -82,6 +82,7 @@
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#define ECR_V_DTLB_MISS 0x05
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#define ECR_V_PROTV 0x06
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#define ECR_V_TRAP 0x09
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#define ECR_V_MISALIGN 0x0d
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#endif
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/* DTLB Miss and Protection Violation Cause Codes */

‎arch/arc/include/asm/irqflags-arcv2.h

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,13 @@
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#define ARCV2_IRQ_DEF_PRIO 1
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/* seed value for status register */
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#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \
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#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
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#define __AD_ENB STATUS_AD_MASK
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#else
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#define __AD_ENB 0
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#endif
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#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | __AD_ENB | \
4854
(ARCV2_IRQ_DEF_PRIO << 1))
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#ifndef __ASSEMBLY__

‎arch/arc/kernel/head.S

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Original file line numberDiff line numberDiff line change
@@ -54,7 +54,12 @@
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; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
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; by default
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lr r5, [status32]
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#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
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bset r5, r5, STATUS_AD_BIT
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#else
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; Although disabled at reset, bootloader might have enabled it
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bclr r5, r5, STATUS_AD_BIT
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#endif
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kflag r5
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#endif
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.endm

‎arch/arc/kernel/intc-arcv2.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@ void arc_init_IRQ(void)
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/* setup status32, don't enable intr yet as kernel doesn't want */
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tmp = read_aux_reg(ARC_REG_STATUS32);
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tmp |= STATUS_AD_MASK | (ARCV2_IRQ_DEF_PRIO << 1);
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tmp |= ARCV2_IRQ_DEF_PRIO << 1;
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tmp &= ~STATUS_IE_MASK;
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asm volatile("kflag %0 \n"::"r"(tmp));
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}

‎arch/arc/kernel/setup.c

Lines changed: 16 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -263,7 +263,7 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
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{
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
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struct bcr_identity *core = &cpu->core;
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int i, n = 0, ua = 0;
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int n = 0;
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FIX_PTR(cpu);
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@@ -283,16 +283,23 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
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IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
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IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
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286-
#ifdef __ARC_UNALIGNED__
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ua = 1;
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n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s",
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IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
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IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
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IS_AVAIL2(cpu->isa.unalign, "unalign ", CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS));
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#if defined(__ARC_UNALIGNED__) && !defined(CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS)
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/*
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* gcc 7.3.1 (GNU 2018.03) onwards generate unaligned access by default
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* but -mno-unaligned-access to disable that didn't work until gcc 8.2.1
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* (GNU 2019.03). So landing here implies the interim period, when
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* despite Kconfig being off, gcc is generating unaligned accesses which
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* could bomb later on. So better to disallow such broken builds
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*/
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BUILD_BUG_ON_MSG(1, "gcc doesn't support -mno-unaligned-access");
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#endif
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n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s%s",
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IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
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IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
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IS_AVAIL1(cpu->isa.unalign, "unalign "), IS_USED_RUN(ua));
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294-
if (i)
295-
n += scnprintf(buf + n, len - n, "\n\t\t: ");
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n += scnprintf(buf + n, len - n, "\n\t\t: ");
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if (cpu->extn_mpy.ver) {
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if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */

‎arch/arc/kernel/troubleshoot.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -145,7 +145,8 @@ static void show_ecr_verbose(struct pt_regs *regs)
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} else if (vec == ECR_V_PROTV) {
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if (cause_code == ECR_C_PROTV_INST_FETCH)
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pr_cont("Execute from Non-exec Page\n");
148-
else if (cause_code == ECR_C_PROTV_MISALIG_DATA)
148+
else if (cause_code == ECR_C_PROTV_MISALIG_DATA &&
149+
IS_ENABLED(CONFIG_ISA_ARCOMPACT))
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pr_cont("Misaligned r/w from 0x%08lx\n", address);
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else
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pr_cont("%s access not allowed on page\n",
@@ -161,6 +162,8 @@ static void show_ecr_verbose(struct pt_regs *regs)
161162
pr_cont("Bus Error from Data Mem\n");
162163
else
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pr_cont("Bus Error, check PRM\n");
165+
} else if (vec == ECR_V_MISALIGN) {
166+
pr_cont("Misaligned r/w from 0x%08lx\n", address);
164167
#endif
165168
} else if (vec == ECR_V_TRAP) {
166169
if (regs->ecr_param == 5)

‎arch/arc/lib/Makefile

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,4 +8,10 @@
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lib-y := strchr-700.o strcpy-700.o strlen.o memcmp.o
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lib-$(CONFIG_ISA_ARCOMPACT) += memcpy-700.o memset.o strcmp.o
11-
lib-$(CONFIG_ISA_ARCV2) += memcpy-archs.o memset-archs.o strcmp-archs.o
11+
lib-$(CONFIG_ISA_ARCV2) += memset-archs.o strcmp-archs.o
12+
13+
ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
14+
lib-$(CONFIG_ISA_ARCV2) +=memcpy-archs-unaligned.o
15+
else
16+
lib-$(CONFIG_ISA_ARCV2) +=memcpy-archs.o
17+
endif

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