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Merge tag 'drm-next-2019-03-15' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes and updates from Dave Airlie: "A few various fixes pulls and one late etnaviv pull but it was nearly all fixes anyways. etnaviv: - late next pull - mmu mapping fix - build non-ARM arches - misc fixes i915: - HDCP state handling fix - shrinker interaction fix - atomic state leak fix qxl: - kick out framebuffers early fix amdgpu: - Powerplay fixes - DC fixes - BACO turned off for now on vega20 - Locking fix - KFD MQD fix - gfx9 golden register updates" * tag 'drm-next-2019-03-15' of git://anongit.freedesktop.org/drm/drm: (43 commits) drm/amdgpu: Update gc golden setting for vega family drm/amd/powerplay: correct power reading on fiji drm/amd/powerplay: set max fan target temperature as 105C drm/i915: Relax mmap VMA check drm/i915: Fix atomic state leak when resetting HDMI link drm/i915: Acquire breadcrumb ref before cancelling drm/i915/selftests: Always free spinner on __sseu_prepare error drm/i915: Reacquire priolist cache after dropping the engine lock drm/i915: Protect i915_active iterators from the shrinker drm/i915: HDCP state handling in ddi_update_pipe drm/qxl: remove conflicting framebuffers earlier drm/fb-helper: call vga_remove_vgacon automatically. drm: move i915_kick_out_vgacon to vgaarb drm/amd/display: don't call dm_pp_ function from an fpu block drm: add __user attribute to ptr_to_compat() drm/amdgpu: clear PDs/PTs only after initializing them drm/amd/display: Pass app_tf by value rather than by reference Revert "drm/amdgpu: use BACO reset on vega20 if platform support" drm/amd/powerplay: show the right override pcie parameters drm/amd/powerplay: honor the OD settings ...
2 parents de57818 + 0f1d37e commit 8264fd0

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‎MAINTAINERS

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5278,7 +5278,7 @@ DRM DRIVERS FOR VIVANTE GPU IP
52785278
M: Lucas Stach <l.stach@pengutronix.de>
52795279
R: Russell King <linux+etnaviv@armlinux.org.uk>
52805280
R: Christian Gmeiner <christian.gmeiner@gmail.com>
5281-
L: etnaviv@lists.freedesktop.org
5281+
L: etnaviv@lists.freedesktop.org (moderated for non-subscribers)
52825282
L: dri-devel@lists.freedesktop.org
52835283
S: Maintained
52845284
F: drivers/gpu/drm/etnaviv/

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -947,10 +947,6 @@ int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
947947
if (r)
948948
return r;
949949

950-
r = amdgpu_vm_clear_bo(adev, vm, pt, cursor.level, ats);
951-
if (r)
952-
goto error_free_pt;
953-
954950
if (vm->use_cpu_for_update) {
955951
r = amdgpu_bo_kmap(pt, NULL);
956952
if (r)
@@ -963,6 +959,10 @@ int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
963959
pt->parent = amdgpu_bo_ref(cursor.parent->base.bo);
964960

965961
amdgpu_vm_bo_base_init(&entry->base, vm, pt);
962+
963+
r = amdgpu_vm_clear_bo(adev, vm, pt, cursor.level, ats);
964+
if (r)
965+
goto error_free_pt;
966966
}
967967

968968
return 0;
@@ -3033,13 +3033,14 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
30333033
if (r)
30343034
goto error_unreserve;
30353035

3036+
amdgpu_vm_bo_base_init(&vm->root.base, vm, root);
3037+
30363038
r = amdgpu_vm_clear_bo(adev, vm, root,
30373039
adev->vm_manager.root_level,
30383040
vm->pte_support_ats);
30393041
if (r)
30403042
goto error_unreserve;
30413043

3042-
amdgpu_vm_bo_base_init(&vm->root.base, vm, root);
30433044
amdgpu_bo_unreserve(vm->root.base.bo);
30443045

30453046
if (pasid) {

‎drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -220,6 +220,7 @@ static const struct soc15_reg_golden golden_settings_gc_9_1_rv2[] =
220220

221221
static const struct soc15_reg_golden golden_settings_gc_9_x_common[] =
222222
{
223+
SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_SD_CNTL, 0xffffffff, 0x000001ff),
223224
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_INDEX, 0xffffffff, 0x00000000),
224225
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_DATA, 0xffffffff, 0x2544c382)
225226
};

‎drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -500,9 +500,7 @@ static bool psp_v3_1_smu_reload_quirk(struct psp_context *psp)
500500
struct amdgpu_device *adev = psp->adev;
501501
uint32_t reg;
502502

503-
reg = smnMP1_FIRMWARE_FLAGS | 0x03b00000;
504-
WREG32_SOC15(NBIO, 0, mmPCIE_INDEX2, reg);
505-
reg = RREG32_SOC15(NBIO, 0, mmPCIE_DATA2);
503+
reg = RREG32_PCIE(smnMP1_FIRMWARE_FLAGS | 0x03b00000);
506504
return (reg & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) ? true : false;
507505
}
508506

‎drivers/gpu/drm/amd/amdgpu/soc15.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -461,7 +461,6 @@ static int soc15_asic_reset(struct amdgpu_device *adev)
461461

462462
switch (adev->asic_type) {
463463
case CHIP_VEGA10:
464-
case CHIP_VEGA20:
465464
soc15_asic_get_baco_capability(adev, &baco_reset);
466465
break;
467466
default:

‎drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c

Lines changed: 1 addition & 51 deletions
Original file line numberDiff line numberDiff line change
@@ -323,57 +323,7 @@ static int init_mqd_hiq(struct mqd_manager *mm, void **mqd,
323323
struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr,
324324
struct queue_properties *q)
325325
{
326-
uint64_t addr;
327-
struct cik_mqd *m;
328-
int retval;
329-
330-
retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct cik_mqd),
331-
mqd_mem_obj);
332-
333-
if (retval != 0)
334-
return -ENOMEM;
335-
336-
m = (struct cik_mqd *) (*mqd_mem_obj)->cpu_ptr;
337-
addr = (*mqd_mem_obj)->gpu_addr;
338-
339-
memset(m, 0, ALIGN(sizeof(struct cik_mqd), 256));
340-
341-
m->header = 0xC0310800;
342-
m->compute_pipelinestat_enable = 1;
343-
m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF;
344-
m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF;
345-
m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF;
346-
m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF;
347-
348-
m->cp_hqd_persistent_state = DEFAULT_CP_HQD_PERSISTENT_STATE |
349-
PRELOAD_REQ;
350-
m->cp_hqd_quantum = QUANTUM_EN | QUANTUM_SCALE_1MS |
351-
QUANTUM_DURATION(10);
352-
353-
m->cp_mqd_control = MQD_CONTROL_PRIV_STATE_EN;
354-
m->cp_mqd_base_addr_lo = lower_32_bits(addr);
355-
m->cp_mqd_base_addr_hi = upper_32_bits(addr);
356-
357-
m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE;
358-
359-
/*
360-
* Pipe Priority
361-
* Identifies the pipe relative priority when this queue is connected
362-
* to the pipeline. The pipe priority is against the GFX pipe and HP3D.
363-
* In KFD we are using a fixed pipe priority set to CS_MEDIUM.
364-
* 0 = CS_LOW (typically below GFX)
365-
* 1 = CS_MEDIUM (typically between HP3D and GFX
366-
* 2 = CS_HIGH (typically above HP3D)
367-
*/
368-
m->cp_hqd_pipe_priority = 1;
369-
m->cp_hqd_queue_priority = 15;
370-
371-
*mqd = m;
372-
if (gart_addr)
373-
*gart_addr = addr;
374-
retval = mm->update_mqd(mm, m, q);
375-
376-
return retval;
326+
return init_mqd(mm, mqd, mqd_mem_obj, gart_addr, q);
377327
}
378328

379329
static int update_mqd_hiq(struct mqd_manager *mm, void *mqd,

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

Lines changed: 35 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -886,6 +886,7 @@ static void emulated_link_detect(struct dc_link *link)
886886
return;
887887
}
888888

889+
/* dc_sink_create returns a new reference */
889890
link->local_sink = sink;
890891

891892
edid_status = dm_helpers_read_local_edid(
@@ -952,6 +953,8 @@ static int dm_resume(void *handle)
952953
if (aconnector->fake_enable && aconnector->dc_link->local_sink)
953954
aconnector->fake_enable = false;
954955

956+
if (aconnector->dc_sink)
957+
dc_sink_release(aconnector->dc_sink);
955958
aconnector->dc_sink = NULL;
956959
amdgpu_dm_update_connector_after_detect(aconnector);
957960
mutex_unlock(&aconnector->hpd_lock);
@@ -1061,6 +1064,8 @@ amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector)
10611064

10621065

10631066
sink = aconnector->dc_link->local_sink;
1067+
if (sink)
1068+
dc_sink_retain(sink);
10641069

10651070
/*
10661071
* Edid mgmt connector gets first update only in mode_valid hook and then
@@ -1085,30 +1090,35 @@ amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector)
10851090
* to it anymore after disconnect, so on next crtc to connector
10861091
* reshuffle by UMD we will get into unwanted dc_sink release
10871092
*/
1088-
if (aconnector->dc_sink != aconnector->dc_em_sink)
1089-
dc_sink_release(aconnector->dc_sink);
1093+
dc_sink_release(aconnector->dc_sink);
10901094
}
10911095
aconnector->dc_sink = sink;
1096+
dc_sink_retain(aconnector->dc_sink);
10921097
amdgpu_dm_update_freesync_caps(connector,
10931098
aconnector->edid);
10941099
} else {
10951100
amdgpu_dm_update_freesync_caps(connector, NULL);
1096-
if (!aconnector->dc_sink)
1101+
if (!aconnector->dc_sink) {
10971102
aconnector->dc_sink = aconnector->dc_em_sink;
1098-
else if (aconnector->dc_sink != aconnector->dc_em_sink)
10991103
dc_sink_retain(aconnector->dc_sink);
1104+
}
11001105
}
11011106

11021107
mutex_unlock(&dev->mode_config.mutex);
1108+
1109+
if (sink)
1110+
dc_sink_release(sink);
11031111
return;
11041112
}
11051113

11061114
/*
11071115
* TODO: temporary guard to look for proper fix
11081116
* if this sink is MST sink, we should not do anything
11091117
*/
1110-
if (sink && sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
1118+
if (sink && sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
1119+
dc_sink_release(sink);
11111120
return;
1121+
}
11121122

11131123
if (aconnector->dc_sink == sink) {
11141124
/*
@@ -1117,6 +1127,8 @@ amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector)
11171127
*/
11181128
DRM_DEBUG_DRIVER("DCHPD: connector_id=%d: dc_sink didn't change.\n",
11191129
aconnector->connector_id);
1130+
if (sink)
1131+
dc_sink_release(sink);
11201132
return;
11211133
}
11221134

@@ -1138,6 +1150,7 @@ amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector)
11381150
amdgpu_dm_update_freesync_caps(connector, NULL);
11391151

11401152
aconnector->dc_sink = sink;
1153+
dc_sink_retain(aconnector->dc_sink);
11411154
if (sink->dc_edid.length == 0) {
11421155
aconnector->edid = NULL;
11431156
drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux);
@@ -1158,11 +1171,15 @@ amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector)
11581171
amdgpu_dm_update_freesync_caps(connector, NULL);
11591172
drm_connector_update_edid_property(connector, NULL);
11601173
aconnector->num_modes = 0;
1174+
dc_sink_release(aconnector->dc_sink);
11611175
aconnector->dc_sink = NULL;
11621176
aconnector->edid = NULL;
11631177
}
11641178

11651179
mutex_unlock(&dev->mode_config.mutex);
1180+
1181+
if (sink)
1182+
dc_sink_release(sink);
11661183
}
11671184

11681185
static void handle_hpd_irq(void *param)
@@ -2977,6 +2994,7 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
29772994
return stream;
29782995
} else {
29792996
sink = aconnector->dc_sink;
2997+
dc_sink_retain(sink);
29802998
}
29812999

29823000
stream = dc_create_stream_for_sink(sink);
@@ -3042,8 +3060,7 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
30423060
update_stream_signal(stream, sink);
30433061

30443062
finish:
3045-
if (sink && sink->sink_signal == SIGNAL_TYPE_VIRTUAL && aconnector->base.force != DRM_FORCE_ON)
3046-
dc_sink_release(sink);
3063+
dc_sink_release(sink);
30473064

30483065
return stream;
30493066
}
@@ -3301,6 +3318,14 @@ static void amdgpu_dm_connector_destroy(struct drm_connector *connector)
33013318
dm->backlight_dev = NULL;
33023319
}
33033320
#endif
3321+
3322+
if (aconnector->dc_em_sink)
3323+
dc_sink_release(aconnector->dc_em_sink);
3324+
aconnector->dc_em_sink = NULL;
3325+
if (aconnector->dc_sink)
3326+
dc_sink_release(aconnector->dc_sink);
3327+
aconnector->dc_sink = NULL;
3328+
33043329
drm_dp_cec_unregister_connector(&aconnector->dm_dp_aux.aux);
33053330
drm_connector_unregister(connector);
33063331
drm_connector_cleanup(connector);
@@ -3398,10 +3423,12 @@ static void create_eml_sink(struct amdgpu_dm_connector *aconnector)
33983423
(edid->extensions + 1) * EDID_LENGTH,
33993424
&init_params);
34003425

3401-
if (aconnector->base.force == DRM_FORCE_ON)
3426+
if (aconnector->base.force == DRM_FORCE_ON) {
34023427
aconnector->dc_sink = aconnector->dc_link->local_sink ?
34033428
aconnector->dc_link->local_sink :
34043429
aconnector->dc_em_sink;
3430+
dc_sink_retain(aconnector->dc_sink);
3431+
}
34053432
}
34063433

34073434
static void handle_edid_mgmt(struct amdgpu_dm_connector *aconnector)

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -191,6 +191,7 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector)
191191
&init_params);
192192

193193
dc_sink->priv = aconnector;
194+
/* dc_link_add_remote_sink returns a new reference */
194195
aconnector->dc_sink = dc_sink;
195196

196197
if (aconnector->dc_sink)

‎drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1348,12 +1348,12 @@ void dcn_bw_update_from_pplib(struct dc *dc)
13481348
struct dm_pp_clock_levels_with_voltage fclks = {0}, dcfclks = {0};
13491349
bool res;
13501350

1351-
kernel_fpu_begin();
1352-
13531351
/* TODO: This is not the proper way to obtain fabric_and_dram_bandwidth, should be min(fclk, memclk) */
13541352
res = dm_pp_get_clock_levels_by_type_with_voltage(
13551353
ctx, DM_PP_CLOCK_TYPE_FCLK, &fclks);
13561354

1355+
kernel_fpu_begin();
1356+
13571357
if (res)
13581358
res = verify_clock_values(&fclks);
13591359

@@ -1372,9 +1372,13 @@ void dcn_bw_update_from_pplib(struct dc *dc)
13721372
} else
13731373
BREAK_TO_DEBUGGER();
13741374

1375+
kernel_fpu_end();
1376+
13751377
res = dm_pp_get_clock_levels_by_type_with_voltage(
13761378
ctx, DM_PP_CLOCK_TYPE_DCFCLK, &dcfclks);
13771379

1380+
kernel_fpu_begin();
1381+
13781382
if (res)
13791383
res = verify_clock_values(&dcfclks);
13801384

‎drivers/gpu/drm/amd/display/dc/core/dc_link.c

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -794,6 +794,7 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason)
794794
sink->link->dongle_max_pix_clk = sink_caps.max_hdmi_pixel_clock;
795795
sink->converter_disable_audio = converter_disable_audio;
796796

797+
/* dc_sink_create returns a new reference */
797798
link->local_sink = sink;
798799

799800
edid_status = dm_helpers_read_local_edid(
@@ -2037,6 +2038,9 @@ static enum dc_status enable_link(
20372038
break;
20382039
}
20392040

2041+
if (status == DC_OK)
2042+
pipe_ctx->stream->link->link_status.link_active = true;
2043+
20402044
return status;
20412045
}
20422046

@@ -2060,6 +2064,14 @@ static void disable_link(struct dc_link *link, enum signal_type signal)
20602064
dp_disable_link_phy_mst(link, signal);
20612065
} else
20622066
link->link_enc->funcs->disable_output(link->link_enc, signal);
2067+
2068+
if (signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
2069+
/* MST disable link only when no stream use the link */
2070+
if (link->mst_stream_alloc_table.stream_count <= 0)
2071+
link->link_status.link_active = false;
2072+
} else {
2073+
link->link_status.link_active = false;
2074+
}
20632075
}
20642076

20652077
static bool dp_active_dongle_validate_timing(
@@ -2623,8 +2635,6 @@ void core_link_enable_stream(
26232635
}
26242636
}
26252637

2626-
stream->link->link_status.link_active = true;
2627-
26282638
core_dc->hwss.enable_audio_stream(pipe_ctx);
26292639

26302640
/* turn off otg test pattern if enable */
@@ -2659,8 +2669,6 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)
26592669
core_dc->hwss.disable_stream(pipe_ctx, option);
26602670

26612671
disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal);
2662-
2663-
pipe_ctx->stream->link->link_status.link_active = false;
26642672
}
26652673

26662674
void core_link_set_avmute(struct pipe_ctx *pipe_ctx, bool enable)

‎drivers/gpu/drm/amd/display/modules/freesync/freesync.c

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -724,16 +724,15 @@ static void build_vrr_infopacket_v1(enum signal_type signal,
724724

725725
static void build_vrr_infopacket_v2(enum signal_type signal,
726726
const struct mod_vrr_params *vrr,
727-
const enum color_transfer_func *app_tf,
727+
enum color_transfer_func app_tf,
728728
struct dc_info_packet *infopacket)
729729
{
730730
unsigned int payload_size = 0;
731731

732732
build_vrr_infopacket_header_v2(signal, infopacket, &payload_size);
733733
build_vrr_infopacket_data(vrr, infopacket);
734734

735-
if (app_tf != NULL)
736-
build_vrr_infopacket_fs2_data(*app_tf, infopacket);
735+
build_vrr_infopacket_fs2_data(app_tf, infopacket);
737736

738737
build_vrr_infopacket_checksum(&payload_size, infopacket);
739738

@@ -757,7 +756,7 @@ void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync,
757756
const struct dc_stream_state *stream,
758757
const struct mod_vrr_params *vrr,
759758
enum vrr_packet_type packet_type,
760-
const enum color_transfer_func *app_tf,
759+
enum color_transfer_func app_tf,
761760
struct dc_info_packet *infopacket)
762761
{
763762
/* SPD info packet for FreeSync

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