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Merge tag 'drm-intel-fixes-2018-09-19' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes
Only fixes coming from gvt containing "Two more BXT fixes from Colin, one srcu locking fix and one fix for GGTT clear when destroy vGPU." Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180919151915.GA6309@intel.com
2 parents d5b3a31 + a530bf9 commit 8ca4fff

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4 files changed

+36
-1
lines changed

4 files changed

+36
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lines changed

drivers/gpu/drm/i915/gvt/handlers.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3210,6 +3210,7 @@ static int init_bxt_mmio_info(struct intel_gvt *gvt)
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MMIO_D(BXT_DSI_PLL_ENABLE, D_BXT);
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MMIO_D(GEN9_CLKGATE_DIS_0, D_BXT);
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MMIO_D(GEN9_CLKGATE_DIS_4, D_BXT);
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32143215
MMIO_D(HSW_TVIDEO_DIP_GCP(TRANSCODER_A), D_BXT);
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MMIO_D(HSW_TVIDEO_DIP_GCP(TRANSCODER_B), D_BXT);

drivers/gpu/drm/i915/gvt/kvmgt.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1833,15 +1833,20 @@ static bool kvmgt_is_valid_gfn(unsigned long handle, unsigned long gfn)
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{
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struct kvmgt_guest_info *info;
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struct kvm *kvm;
1836+
int idx;
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bool ret;
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if (!handle_valid(handle))
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return false;
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info = (struct kvmgt_guest_info *)handle;
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kvm = info->kvm;
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1843-
return kvm_is_visible_gfn(kvm, gfn);
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idx = srcu_read_lock(&kvm->srcu);
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ret = kvm_is_visible_gfn(kvm, gfn);
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srcu_read_unlock(&kvm->srcu, idx);
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1849+
return ret;
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}
18461851

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struct intel_gvt_mpt kvmgt_mpt = {

drivers/gpu/drm/i915/gvt/mmio.c

Lines changed: 28 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -244,6 +244,34 @@ void intel_vgpu_reset_mmio(struct intel_vgpu *vgpu, bool dmlr)
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/* set the bit 0:2(Core C-State ) to C0 */
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vgpu_vreg_t(vgpu, GEN6_GT_CORE_STATUS) = 0;
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248+
if (IS_BROXTON(vgpu->gvt->dev_priv)) {
249+
vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) &=
250+
~(BIT(0) | BIT(1));
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vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &=
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~PHY_POWER_GOOD;
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vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) &=
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~PHY_POWER_GOOD;
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vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) &=
256+
~BIT(30);
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vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY1)) &=
258+
~BIT(30);
259+
vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) &=
260+
~BXT_PHY_LANE_ENABLED;
261+
vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) |=
262+
BXT_PHY_CMNLANE_POWERDOWN_ACK |
263+
BXT_PHY_LANE_POWERDOWN_ACK;
264+
vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) &=
265+
~BXT_PHY_LANE_ENABLED;
266+
vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) |=
267+
BXT_PHY_CMNLANE_POWERDOWN_ACK |
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BXT_PHY_LANE_POWERDOWN_ACK;
269+
vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_C)) &=
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~BXT_PHY_LANE_ENABLED;
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vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_C)) |=
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BXT_PHY_CMNLANE_POWERDOWN_ACK |
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BXT_PHY_LANE_POWERDOWN_ACK;
274+
}
247275
} else {
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#define GVT_GEN8_MMIO_RESET_OFFSET (0x44200)
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/* only reset the engine related, so starting with 0x44200

drivers/gpu/drm/i915/gvt/vgpu.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -281,6 +281,7 @@ void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu)
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intel_vgpu_clean_submission(vgpu);
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intel_vgpu_clean_display(vgpu);
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intel_vgpu_clean_opregion(vgpu);
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intel_vgpu_reset_ggtt(vgpu, true);
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intel_vgpu_clean_gtt(vgpu);
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intel_gvt_hypervisor_detach_vgpu(vgpu);
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intel_vgpu_free_resource(vgpu);

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