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Jisheng Zhangbjorn-helgaas
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PCI: dwc: Fix scheduling while atomic issues
When programming the inbound/outbound ATUs, we call usleep_range() after each checking PCIE_ATU_ENABLE bit. Unfortunately, the ATU programming can be executed in atomic context: inbound ATU programming could be called through pci_epc_write_header() =>dw_pcie_ep_write_header() =>dw_pcie_prog_inbound_atu() outbound ATU programming could be called through pci_bus_read_config_dword() =>dw_pcie_rd_conf() =>dw_pcie_prog_outbound_atu() Fix this issue by calling mdelay() instead. Fixes: f8aed6e ("PCI: dwc: designware: Add EP mode support") Fixes: d8bbeb3 ("PCI: designware: Wait for iATU enable") Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> [lorenzo.pieralisi@arm.com: commit log update] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
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-6
lines changed

2 files changed

+5
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lines changed

drivers/pci/controller/dwc/pcie-designware.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -135,7 +135,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index,
135135
if (val & PCIE_ATU_ENABLE)
136136
return;
137137

138-
usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
138+
mdelay(LINK_WAIT_IATU);
139139
}
140140
dev_err(pci->dev, "Outbound iATU is not being enabled\n");
141141
}
@@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
178178
if (val & PCIE_ATU_ENABLE)
179179
return;
180180

181-
usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
181+
mdelay(LINK_WAIT_IATU);
182182
}
183183
dev_err(pci->dev, "Outbound iATU is not being enabled\n");
184184
}
@@ -236,7 +236,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index,
236236
if (val & PCIE_ATU_ENABLE)
237237
return 0;
238238

239-
usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
239+
mdelay(LINK_WAIT_IATU);
240240
}
241241
dev_err(pci->dev, "Inbound iATU is not being enabled\n");
242242

@@ -282,7 +282,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar,
282282
if (val & PCIE_ATU_ENABLE)
283283
return 0;
284284

285-
usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
285+
mdelay(LINK_WAIT_IATU);
286286
}
287287
dev_err(pci->dev, "Inbound iATU is not being enabled\n");
288288

drivers/pci/controller/dwc/pcie-designware.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,7 @@
2626

2727
/* Parameters for the waiting for iATU enabled routine */
2828
#define LINK_WAIT_MAX_IATU_RETRIES 5
29-
#define LINK_WAIT_IATU_MIN 9000
30-
#define LINK_WAIT_IATU_MAX 10000
29+
#define LINK_WAIT_IATU 9
3130

3231
/* Synopsys-specific PCIe configuration registers */
3332
#define PCIE_PORT_LINK_CONTROL 0x710

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