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mszyprowRussell King
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ARM: 8847/1: pm: fix HYP/SVC mode mismatch when MCPM is used
MCPM does a soft reset of the CPUs and uses common cpu_resume() routine to perform low-level platform initialization. This results in a try to install HYP stubs for the second time for each CPU and results in false HYP/SVC mode mismatch detection. The HYP stubs are already installed at the beginning of the kernel initialization on the boot CPU (head.S) or in the secondary_startup() for other CPUs. To fix this issue MCPM code should use a cpu_resume() routine without HYP stubs installation. This change fixes HYP/SVC mode mismatch on Samsung Exynos5422-based Odroid XU3/XU4/HC1 boards. Fixes: 3721924 ("ARM: 8081/1: MCPM: provide infrastructure to allow for MCPM loopback") Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Nicolas Pitre <nico@linaro.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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arch/arm/common/mcpm_entry.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -381,7 +381,7 @@ static int __init nocache_trampoline(unsigned long _arg)
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unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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phys_reset_t phys_reset;
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mcpm_set_entry_vector(cpu, cluster, cpu_resume);
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mcpm_set_entry_vector(cpu, cluster, cpu_resume_no_hyp);
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setup_mm_for_reboot();
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__mcpm_cpu_going_down(cpu, cluster);

arch/arm/include/asm/suspend.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@ struct sleep_save_sp {
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};
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extern void cpu_resume(void);
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extern void cpu_resume_no_hyp(void);
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extern void cpu_resume_arm(void);
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extern int cpu_suspend(unsigned long, int (*)(unsigned long));
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arch/arm/kernel/sleep.S

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,14 @@ ENDPROC(cpu_resume_after_mmu)
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.text
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.align
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#ifdef CONFIG_MCPM
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.arm
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THUMB( .thumb )
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ENTRY(cpu_resume_no_hyp)
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ARM_BE8(setend be) @ ensure we are in BE mode
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b no_hyp
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#endif
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#ifdef CONFIG_MMU
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.arm
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ENTRY(cpu_resume_arm)
@@ -135,6 +143,7 @@ ARM_BE8(setend be) @ ensure we are in BE mode
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bl __hyp_stub_install_secondary
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#endif
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safe_svcmode_maskall r1
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no_hyp:
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mov r1, #0
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ALT_SMP(mrc p15, 0, r0, c0, c0, 5)
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ALT_UP_B(1f)
@@ -163,6 +172,9 @@ ENDPROC(cpu_resume)
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#ifdef CONFIG_MMU
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ENDPROC(cpu_resume_arm)
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#endif
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#ifdef CONFIG_MCPM
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ENDPROC(cpu_resume_no_hyp)
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#endif
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.align 2

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