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Recommit "[X86] Merge the FEATURE_64BIT and FEATURE_EM64T bits in X86TargetParser.def."
These represent the same thing but 64BIT only showed up from getHostCPUFeatures providing a list of featuers to clang. While EM64T showed up from getting the features for a named CPU. EM64T didn't have a string specifically so it would not be passed up to clang when getting features for a named CPU. While 64bit needed a name since that's how it is index. Merge them by filtering 64bit out before sending features to clang for named CPUs.
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3 files changed

+30
-23
lines changed

3 files changed

+30
-23
lines changed

‎llvm/include/llvm/Support/X86TargetParser.def

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -184,10 +184,6 @@ X86_FEATURE (CLWB, "clwb")
184184
X86_FEATURE (CLZERO, "clzero")
185185
X86_FEATURE (CMPXCHG16B, "cx16")
186186
X86_FEATURE (CMPXCHG8B, "cx8")
187-
// FIXME: Merge with 64BIT? Currently separate to be used to tell if CPU is
188-
// valid for 64-bit mode, but has empty string so it doesn't get added to
189-
// target attributes in IR.
190-
X86_FEATURE (EM64T, "")
191187
X86_FEATURE (ENQCMD, "enqcmd")
192188
X86_FEATURE (F16C, "f16c")
193189
X86_FEATURE (FSGSBASE, "fsgsbase")

‎llvm/lib/Support/Host.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -868,7 +868,7 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
868868
}
869869
break;
870870
}
871-
if (testFeature(X86::FEATURE_EM64T)) {
871+
if (testFeature(X86::FEATURE_64BIT)) {
872872
*Type = X86::INTEL_CORE2; // "core2"
873873
*Subtype = X86::INTEL_CORE2_65;
874874
break;
@@ -894,7 +894,7 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
894894
}
895895
break;
896896
case 15: {
897-
if (testFeature(X86::FEATURE_EM64T)) {
897+
if (testFeature(X86::FEATURE_64BIT)) {
898898
*Type = X86::INTEL_NOCONA;
899899
break;
900900
}
@@ -1140,7 +1140,7 @@ static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf,
11401140
setFeature(X86::FEATURE_FMA4);
11411141

11421142
if (HasExtLeaf1 && ((EDX >> 29) & 1))
1143-
setFeature(X86::FEATURE_EM64T);
1143+
setFeature(X86::FEATURE_64BIT);
11441144
}
11451145

11461146
StringRef sys::getHostCPUName() {

‎llvm/lib/Support/X86TargetParser.cpp

Lines changed: 27 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,14 @@ class FeatureBitset {
4848
return (Bits[I / 32] & Mask) != 0;
4949
}
5050

51+
constexpr FeatureBitset &operator&=(const FeatureBitset &RHS) {
52+
for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I) {
53+
uint32_t NewBits = Bits[I] & RHS.Bits[I];
54+
Bits[I] = NewBits;
55+
}
56+
return *this;
57+
}
58+
5159
constexpr FeatureBitset &operator|=(const FeatureBitset &RHS) {
5260
for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I) {
5361
uint32_t NewBits = Bits[I] | RHS.Bits[I];
@@ -57,16 +65,14 @@ class FeatureBitset {
5765
}
5866

5967
constexpr FeatureBitset operator&(const FeatureBitset &RHS) const {
60-
FeatureBitset Result;
61-
for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I)
62-
Result.Bits[I] = Bits[I] & RHS.Bits[I];
68+
FeatureBitset Result = *this;
69+
Result &= RHS;
6370
return Result;
6471
}
6572

6673
constexpr FeatureBitset operator|(const FeatureBitset &RHS) const {
67-
FeatureBitset Result;
68-
for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I)
69-
Result.Bits[I] = Bits[I] | RHS.Bits[I];
74+
FeatureBitset Result = *this;
75+
Result |= RHS;
7076
return Result;
7177
}
7278

@@ -111,10 +117,10 @@ static constexpr FeatureBitset FeaturesPentium4 =
111117
static constexpr FeatureBitset FeaturesPrescott =
112118
FeaturesPentium4 | FeatureSSE3;
113119
static constexpr FeatureBitset FeaturesNocona =
114-
FeaturesPrescott | FeatureEM64T | FeatureCMPXCHG16B;
120+
FeaturesPrescott | Feature64BIT | FeatureCMPXCHG16B;
115121

116122
// Basic 64-bit capable CPU.
117-
static constexpr FeatureBitset FeaturesX86_64 = FeaturesPentium4 | FeatureEM64T;
123+
static constexpr FeatureBitset FeaturesX86_64 = FeaturesPentium4 | Feature64BIT;
118124

119125
// Intel Core CPUs
120126
static constexpr FeatureBitset FeaturesCore2 =
@@ -201,15 +207,15 @@ static constexpr FeatureBitset FeaturesAthlon =
201207
static constexpr FeatureBitset FeaturesAthlonXP =
202208
FeaturesAthlon | FeatureFXSR | FeatureSSE;
203209
static constexpr FeatureBitset FeaturesK8 =
204-
FeaturesAthlonXP | FeatureSSE2 | FeatureEM64T;
210+
FeaturesAthlonXP | FeatureSSE2 | Feature64BIT;
205211
static constexpr FeatureBitset FeaturesK8SSE3 = FeaturesK8 | FeatureSSE3;
206212
static constexpr FeatureBitset FeaturesAMDFAM10 =
207213
FeaturesK8SSE3 | FeatureCMPXCHG16B | FeatureLZCNT | FeaturePOPCNT |
208214
FeaturePRFCHW | FeatureSAHF | FeatureSSE4_A;
209215

210216
// Bobcat architecture processors.
211217
static constexpr FeatureBitset FeaturesBTVER1 =
212-
FeatureX87 | FeatureCMPXCHG8B | FeatureCMPXCHG16B | FeatureEM64T |
218+
FeatureX87 | FeatureCMPXCHG8B | FeatureCMPXCHG16B | Feature64BIT |
213219
FeatureFXSR | FeatureLZCNT | FeatureMMX | FeaturePOPCNT | FeaturePRFCHW |
214220
FeatureSSE | FeatureSSE2 | FeatureSSE3 | FeatureSSSE3 | FeatureSSE4_A |
215221
FeatureSAHF;
@@ -220,7 +226,7 @@ static constexpr FeatureBitset FeaturesBTVER2 =
220226
// AMD Bulldozer architecture processors.
221227
static constexpr FeatureBitset FeaturesBDVER1 =
222228
FeatureX87 | FeatureAES | FeatureAVX | FeatureCMPXCHG8B |
223-
FeatureCMPXCHG16B | FeatureEM64T | FeatureFMA4 | FeatureFXSR | FeatureLWP |
229+
FeatureCMPXCHG16B | Feature64BIT | FeatureFMA4 | FeatureFXSR | FeatureLWP |
224230
FeatureLZCNT | FeatureMMX | FeaturePCLMUL | FeaturePOPCNT | FeaturePRFCHW |
225231
FeatureSAHF | FeatureSSE | FeatureSSE2 | FeatureSSE3 | FeatureSSSE3 |
226232
FeatureSSE4_1 | FeatureSSE4_2 | FeatureSSE4_A | FeatureXOP | FeatureXSAVE;
@@ -236,7 +242,7 @@ static constexpr FeatureBitset FeaturesBDVER4 =
236242
static constexpr FeatureBitset FeaturesZNVER1 =
237243
FeatureX87 | FeatureADX | FeatureAES | FeatureAVX | FeatureAVX2 |
238244
FeatureBMI | FeatureBMI2 | FeatureCLFLUSHOPT | FeatureCLZERO |
239-
FeatureCMPXCHG8B | FeatureCMPXCHG16B | FeatureEM64T | FeatureF16C |
245+
FeatureCMPXCHG8B | FeatureCMPXCHG16B | Feature64BIT | FeatureF16C |
240246
FeatureFMA | FeatureFSGSBASE | FeatureFXSR | FeatureLZCNT | FeatureMMX |
241247
FeatureMOVBE | FeatureMWAITX | FeaturePCLMUL | FeaturePOPCNT |
242248
FeaturePRFCHW | FeatureRDRND | FeatureRDSEED | FeatureSAHF | FeatureSHA |
@@ -363,7 +369,7 @@ static constexpr ProcInfo Processors[] = {
363369

364370
X86::CPUKind llvm::X86::parseArchX86(StringRef CPU, bool Only64Bit) {
365371
for (const auto &P : Processors)
366-
if (P.Name == CPU && (P.Features[FEATURE_EM64T] || !Only64Bit))
372+
if (P.Name == CPU && (P.Features[FEATURE_64BIT] || !Only64Bit))
367373
return P.Kind;
368374

369375
return CK_None;
@@ -372,7 +378,7 @@ X86::CPUKind llvm::X86::parseArchX86(StringRef CPU, bool Only64Bit) {
372378
void llvm::X86::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values,
373379
bool Only64Bit) {
374380
for (const auto &P : Processors)
375-
if (!P.Name.empty() && (P.Features[FEATURE_EM64T] || !Only64Bit))
381+
if (!P.Name.empty() && (P.Features[FEATURE_64BIT] || !Only64Bit))
376382
Values.emplace_back(P.Name);
377383
}
378384

@@ -401,7 +407,6 @@ static constexpr FeatureBitset ImpliedFeaturesCLZERO = {};
401407
static constexpr FeatureBitset ImpliedFeaturesCMOV = {};
402408
static constexpr FeatureBitset ImpliedFeaturesCMPXCHG16B = {};
403409
static constexpr FeatureBitset ImpliedFeaturesCMPXCHG8B = {};
404-
static constexpr FeatureBitset ImpliedFeaturesEM64T = {};
405410
static constexpr FeatureBitset ImpliedFeaturesENQCMD = {};
406411
static constexpr FeatureBitset ImpliedFeaturesFSGSBASE = {};
407412
static constexpr FeatureBitset ImpliedFeaturesFXSR = {};
@@ -528,8 +533,14 @@ void llvm::X86::getFeaturesForCPU(StringRef CPU,
528533
[&](const ProcInfo &P) { return P.Name == CPU; });
529534
assert(I != std::end(Processors) && "Processor not found!");
530535

536+
FeatureBitset Bits = I->Features;
537+
538+
// Remove the 64-bit feature which we only use to validate if a CPU can
539+
// be used with 64-bit mode.
540+
Bits &= ~Feature64BIT;
541+
531542
// Add the string version of all set bits.
532-
getFeatureBitsAsStrings(I->Features, EnabledFeatures);
543+
getFeatureBitsAsStrings(Bits, EnabledFeatures);
533544
}
534545

535546
// For each feature that is (transitively) implied by this feature, set it.

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