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davemgreendavemgreen
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[AArch64] Add FeatureFuseCCSelect to a number of CPU configurations.
This marks CMP+CSel as fusable according to the SWOGs of cortex-a78 cortex-a710 cortex-a715 cortex-a720 cortex-a725 cortex-x4 cortex-x925 neoverse-n2 neoverse-n3 neoverse-v1 neoverse-v2 neoverse-v3
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‎llvm/lib/Target/AArch64/AArch64Processors.td

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@@ -134,6 +134,7 @@ def TuneA78 : SubtargetFeature<"a78", "ARMProcFamily", "CortexA78",
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FeatureCmpBccFusion,
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FeatureFuseAES,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureAddrLSLSlow14,
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FeatureALULSLFast,
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FeaturePostRAScheduler,
@@ -146,6 +147,7 @@ def TuneA78AE : SubtargetFeature<"a78ae", "ARMProcFamily",
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FeatureCmpBccFusion,
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FeatureFuseAES,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureAddrLSLSlow14,
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FeatureALULSLFast,
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FeaturePostRAScheduler,
@@ -158,6 +160,7 @@ def TuneA78C : SubtargetFeature<"a78c", "ARMProcFamily",
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FeatureCmpBccFusion,
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FeatureFuseAES,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureAddrLSLSlow14,
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FeatureALULSLFast,
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FeaturePostRAScheduler,
@@ -169,6 +172,7 @@ def TuneA710 : SubtargetFeature<"a710", "ARMProcFamily", "CortexA710",
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FeatureCmpBccFusion,
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FeatureFuseAES,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureALULSLFast,
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FeaturePostRAScheduler,
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FeatureEnableSelectOptimize,
@@ -181,6 +185,7 @@ def TuneA715 : SubtargetFeature<"a715", "ARMProcFamily", "CortexA715",
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FeatureCmpBccFusion,
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FeatureALULSLFast,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureEnableSelectOptimize,
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FeaturePredictableSelectIsExpensive]>;
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@@ -191,6 +196,7 @@ def TuneA720 : SubtargetFeature<"a720", "ARMProcFamily", "CortexA720",
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FeatureCmpBccFusion,
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FeatureALULSLFast,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureEnableSelectOptimize,
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FeaturePredictableSelectIsExpensive]>;
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@@ -201,6 +207,7 @@ def TuneA720AE : SubtargetFeature<"a720ae", "ARMProcFamily", "CortexA720",
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FeatureCmpBccFusion,
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FeatureALULSLFast,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureEnableSelectOptimize,
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FeaturePredictableSelectIsExpensive]>;
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@@ -212,6 +219,7 @@ def TuneA725 : SubtargetFeature<"cortex-a725", "ARMProcFamily",
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FeatureCmpBccFusion,
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FeatureALULSLFast,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureEnableSelectOptimize,
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FeaturePredictableSelectIsExpensive]>;
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@@ -262,6 +270,7 @@ def TuneX4 : SubtargetFeature<"cortex-x4", "ARMProcFamily", "CortexX4",
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"Cortex-X4 ARM processors", [
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FeatureALULSLFast,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureFuseAES,
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FeaturePostRAScheduler,
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FeatureEnableSelectOptimize,
@@ -273,6 +282,7 @@ def TuneX925 : SubtargetFeature<"cortex-x925", "ARMProcFamily",
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"CortexX925", "Cortex-X925 ARM processors",[
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FeatureALULSLFast,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureFuseAES,
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FeaturePostRAScheduler,
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FeatureEnableSelectOptimize,
@@ -536,6 +546,7 @@ def TuneNeoverseN2 : SubtargetFeature<"neoversen2", "ARMProcFamily", "NeoverseN2
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"Neoverse N2 ARM processors", [
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FeatureFuseAES,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureALULSLFast,
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FeaturePostRAScheduler,
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FeatureEnableSelectOptimize,
@@ -547,6 +558,7 @@ def TuneNeoverseN3 : SubtargetFeature<"neoversen3", "ARMProcFamily", "NeoverseN3
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FeaturePostRAScheduler,
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FeatureALULSLFast,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureEnableSelectOptimize,
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FeaturePredictableSelectIsExpensive]>;
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@@ -563,6 +575,7 @@ def TuneNeoverseV1 : SubtargetFeature<"neoversev1", "ARMProcFamily", "NeoverseV1
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"Neoverse V1 ARM processors", [
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FeatureFuseAES,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureAddrLSLSlow14,
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FeatureALULSLFast,
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FeaturePostRAScheduler,
@@ -575,6 +588,7 @@ def TuneNeoverseV2 : SubtargetFeature<"neoversev2", "ARMProcFamily", "NeoverseV2
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FeatureFuseAES,
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FeatureCmpBccFusion,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeatureALULSLFast,
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FeaturePostRAScheduler,
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FeatureEnableSelectOptimize,
@@ -588,6 +602,7 @@ def TuneNeoverseV3 : SubtargetFeature<"neoversev3", "ARMProcFamily", "NeoverseV3
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FeatureFuseAES,
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FeatureALULSLFast,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeaturePostRAScheduler,
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FeatureEnableSelectOptimize,
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FeatureAvoidLDAPUR,
@@ -598,6 +613,7 @@ def TuneNeoverseV3AE : SubtargetFeature<"neoversev3AE", "ARMProcFamily", "Neover
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FeatureFuseAES,
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FeatureALULSLFast,
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FeatureFuseAdrpAdd,
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FeatureFuseCCSelect,
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FeaturePostRAScheduler,
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FeatureEnableSelectOptimize,
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FeatureAvoidLDAPUR,

‎llvm/test/CodeGen/AArch64/misched-fusion-csel.ll

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@@ -2,6 +2,18 @@
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=exynos-m3 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=exynos-m4 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=exynos-m5 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a78 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a710 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a715 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a720 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a725 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-x4 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-x925 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-n2 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-n3 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-v1 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-v2 | FileCheck %s
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; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-v3 | FileCheck %s
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target triple = "aarch64-unknown"
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