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Andres-SalamancaAndres-Salamanca
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[CIR] Add support for discrete bit-field (#156085)
This PR adds support for the discrete bit-field layout. It is the same as this PR: llvm/clangir#1860
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‎clang/include/clang/CIR/Dialect/IR/CIRDataLayout.h

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@@ -68,6 +68,18 @@ class CIRDataLayout {
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return llvm::alignTo(getTypeStoreSize(ty), getABITypeAlign(ty).value());
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}
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/// Returns the offset in bits between successive objects of the
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/// specified type, including alignment padding; always a multiple of 8.
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///
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/// If Ty is a scalable vector type, the scalable property will be set and
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/// the runtime size will be a positive integer multiple of the base size.
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///
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/// This is the amount that alloca reserves for this type. For example,
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/// returns 96 or 128 for x86_fp80, depending on alignment.
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llvm::TypeSize getTypeAllocSizeInBits(mlir::Type ty) const {
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return 8 * getTypeAllocSize(ty);
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}
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llvm::TypeSize getTypeSizeInBits(mlir::Type ty) const;
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};
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‎clang/include/clang/CIR/MissingFeatures.h

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@@ -146,7 +146,6 @@ struct MissingFeatures {
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static bool cxxabiUseARMMethodPtrABI() { return false; }
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static bool cxxabiUseARMGuardVarABI() { return false; }
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static bool cxxabiAppleARM64CXXABI() { return false; }
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static bool isDiscreteBitFieldABI() { return false; }
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// Address class
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static bool addressOffset() { return false; }

‎clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp

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@@ -108,6 +108,16 @@ struct CIRRecordLowering final {
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// not the primary vbase of some base class.
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bool hasOwnStorage(const CXXRecordDecl *decl, const CXXRecordDecl *query);
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/// The Microsoft bitfield layout rule allocates discrete storage
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/// units of the field's formal type and only combines adjacent
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/// fields of the same formal type. We want to emit a layout with
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/// these discrete storage units instead of combining them into a
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/// continuous run.
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bool isDiscreteBitFieldABI() {
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return astContext.getTargetInfo().getCXXABI().isMicrosoft() ||
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recordDecl->isMsStruct(astContext);
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}
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CharUnits bitsToCharUnits(uint64_t bitOffset) {
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return astContext.toCharUnitsFromBits(bitOffset);
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}
@@ -323,7 +333,45 @@ void CIRRecordLowering::fillOutputFields() {
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RecordDecl::field_iterator
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CIRRecordLowering::accumulateBitFields(RecordDecl::field_iterator field,
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RecordDecl::field_iterator fieldEnd) {
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assert(!cir::MissingFeatures::isDiscreteBitFieldABI());
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if (isDiscreteBitFieldABI()) {
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// run stores the first element of the current run of bitfields. fieldEnd is
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// used as a special value to note that we don't have a current run. A
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// bitfield run is a contiguous collection of bitfields that can be stored
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// in the same storage block. Zero-sized bitfields and bitfields that would
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// cross an alignment boundary break a run and start a new one.
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RecordDecl::field_iterator run = fieldEnd;
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// tail is the offset of the first bit off the end of the current run. It's
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// used to determine if the ASTRecordLayout is treating these two bitfields
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// as contiguous. StartBitOffset is offset of the beginning of the Run.
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uint64_t startBitOffset, tail = 0;
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for (; field != fieldEnd && field->isBitField(); ++field) {
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// Zero-width bitfields end runs.
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if (field->isZeroLengthBitField()) {
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run = fieldEnd;
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continue;
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}
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uint64_t bitOffset = getFieldBitOffset(*field);
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mlir::Type type = cirGenTypes.convertTypeForMem(field->getType());
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// If we don't have a run yet, or don't live within the previous run's
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// allocated storage then we allocate some storage and start a new run.
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if (run == fieldEnd || bitOffset >= tail) {
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run = field;
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startBitOffset = bitOffset;
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tail = startBitOffset + dataLayout.getTypeAllocSizeInBits(type);
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// Add the storage member to the record. This must be added to the
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// record before the bitfield members so that it gets laid out before
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// the bitfields it contains get laid out.
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members.push_back(
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makeStorageInfo(bitsToCharUnits(startBitOffset), type));
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}
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// Bitfields get the offset of their storage but come afterward and remain
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// there after a stable sort.
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members.push_back(MemberInfo(bitsToCharUnits(startBitOffset),
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MemberInfo::InfoKind::Field, nullptr,
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*field));
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}
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return field;
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}
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CharUnits regSize =
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bitsToCharUnits(astContext.getTargetInfo().getRegisterWidth());

‎clang/test/CIR/CodeGen/mms-bitfields.c

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@@ -0,0 +1,75 @@
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -mms-bitfields -fclangir -emit-cir %s -o %t.cir
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// RUN: FileCheck --input-file=%t.cir %s --check-prefix=CIR
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -mms-bitfields -fclangir -emit-llvm %s -o %t-cir.ll
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// RUN: FileCheck --input-file=%t-cir.ll %s --check-prefix=LLVM
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -mms-bitfields -emit-llvm %s -o %t.ll
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// RUN: FileCheck --input-file=%t.ll %s --check-prefix=OGCG
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struct s1 {
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int f32 : 2;
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long long f64 : 30;
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} s1;
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// CIR-DAG: !rec_s1 = !cir.record<struct "s1" {!s32i, !s64i}>
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// LLVM-DAG: %struct.s1 = type { i32, i64 }
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// OGCG-DAG: %struct.s1 = type { i32, i64 }
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struct s2 {
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int a : 24;
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char b;
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int c : 30;
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} Clip;
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// CIR-DAG: !rec_s2 = !cir.record<struct "s2" {!s32i, !s8i, !s32i}>
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// LLVM-DAG: %struct.s2 = type { i32, i8, i32 }
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// OGCG-DAG: %struct.s2 = type { i32, i8, i32 }
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struct s3 {
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int a : 18;
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int : 0;
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int c : 14;
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} zero_bit;
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// CIR-DAG: !rec_s3 = !cir.record<struct "s3" {!s32i, !s32i}>
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// LLVM-DAG: %struct.s3 = type { i32, i32 }
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// OGCG-DAG: %struct.s3 = type { i32, i32 }
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#pragma pack (push,1)
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struct Inner {
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unsigned int A : 1;
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unsigned int B : 1;
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unsigned int C : 1;
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unsigned int D : 30;
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} Inner;
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#pragma pack (pop)
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// CIR-DAG: !rec_Inner = !cir.record<struct "Inner" {!u32i, !u32i}>
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// LLVM-DAG: %struct.Inner = type { i32, i32 }
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// OGCG-DAG: %struct.Inner = type { i32, i32 }
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#pragma pack(push, 1)
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union HEADER {
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struct A {
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int : 3; // Bits 2:0
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int a : 9; // Bits 11:3
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int : 12; // Bits 23:12
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int b : 17; // Bits 40:24
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int : 7; // Bits 47:41
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int c : 4; // Bits 51:48
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int : 4; // Bits 55:52
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int d : 3; // Bits 58:56
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int : 5; // Bits 63:59
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} Bits;
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} HEADER;
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#pragma pack(pop)
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// CIR-DAG: !rec_A = !cir.record<struct "A" {!s32i, !s32i, !s32i}>
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// CIR-DAG: !rec_HEADER = !cir.record<union "HEADER" {!rec_A}>
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// LLVM-DAG: %struct.A = type { i32, i32, i32 }
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// LLVM-DAG: %union.HEADER = type { %struct.A }
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// OGCG-DAG: %struct.A = type { i32, i32, i32 }
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// OGCG-DAG: %union.HEADER = type { %struct.A }

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