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Commits on Aug 18, 2025

• clang-format

  llvm-beanz

  committed
  75b7612

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• [NFC] Change const char* to StringRef

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  llvm-beanz

  committed
  e45d907

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• [bazel] Port #151175: VectorFromElementsLowering (#154169)

  rupprecht

  authored
  8d25673

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• Revert "[AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#1538… (#154163)

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  broxigarchen

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  d49aab1

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• [RISCV][GISel] Optimize +0.0 to use fcvt.d.w for s64 on rv32 (#153978)

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  sunshaoce

  authored
  7e8ff2a

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• [Inliner] Add option (default off) to inline all calls regardless of the cost (#152365)

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  justinfargnoli

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  58de8f2

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• Decent to Descent (#154040)

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  LauraElanorJones

  authored
  350f4a3

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• [AMDGPU][LowerBufferFatPointers] Fix lack of rewrite when loading/storing null (#154128)

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  krzysz00

  and

  nikic

  authored
  7f27482

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• [Clang][Webassembly] Remove unrachable code in ParseTypeQualifierListOpt (#153729)

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  shafik

  authored
  9982957

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• [Github] Drop llvm-project-tests

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  boomanaiden154

  authored
  6960bf5

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• [DemandedBits] Support non-constant shift amounts (#148880)

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  karouzakisp

  authored
  c2e7fad

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• [mlir][vector] Support multi-dimensional vectors in VectorFromElementsLowering (#151175)

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  5 peopleauthored
  4eb1a07

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• [LV] Emit all remarks for unvectorizable instructions (#153833)

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  tobias-stadler

  authored
  8135b7c

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• [VPlan] Preserve nusw in createInBoundsPtrAdd (#151549)

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  artagnon

  authored
  97f5542

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• [SimplifyCFG] Avoid redundant calls in gather. (NFC) (#154133)

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  andjo403

  authored
  1b60236

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• [MLIR][XeGPU] Distribute load_nd/store_nd/prefetch_nd with offsets from Wg to Sg (#153432)

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  nbpatel

  authored
  4a9d038

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• [gn build] Port 3ecfc0330d93

  llvmgnsyncbot

  committed
  d6e0922

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• [NFC][HLSL] Remove confusing enum aliases / duplicates (#153909)

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  damyanp

  authored
  cc49f3b

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• [clang][dataflow] Add support for serialization and deserialization. (#152487)

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  ymand

  authored
  3ecfc03

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• [mlir][Presburger] NFC: return var index from IntegerRelation::addLocalFloorDiv (#153463)

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  j2kun

  authored
  c67d27d

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• Revert "[SimpleLoopUnswitch] Record loops from unswitching non-trivial conditions"

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  antoniofrighetto

  committed
  33761df

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• [X86] Avoid Register implicit int conversion

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  boomanaiden154

  committed
  17f5f5b

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• [DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (#152273)

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  houngkoungting

  and

  RKSimon

  authored
  0773854

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• [NVVM] Add various intrinsic attrs, cleanup and consolidate td (#153436)

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  AlexMaclean

  authored
  d12f58f

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• [CIR] Upstream GotoOp (#153701)

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  Andres-Salamanca

  authored
  916218c

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• [RISCV] Add P-ext MC support for pli.dh, pli.db, and plui.dh. (#153972)

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  topperc

  authored
  60aa0d4

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• [mlir] Update builders to use new form. (#154132)

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  jpienaar

  authored
  4bf3395

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• [AMDGPU] Make use of SIInstrInfo::isWaitcnt. NFC. (#154087)

  jayfoad

  authored
  f15c6ff

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• [clang][bytecode] Always track item types in InterpStack (#151088)

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  tbaederr

  authored
  6ce13ae

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• [AArch64] Fix build-bot assertion error in AArch64 (#154124)

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  AZero13

  authored
  08a140a

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• [libc++] Implement P3168R2: Give optional range support (#149441)

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  smallp-o-p

  authored
  1c51886

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• [AMDGPU] Narrow only on store to pow of 2 mem location (#150093)

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  zerogtiger

  authored
  4ab1468

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• [AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894)

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  broxigarchen

  authored
  7c53c61

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• [GlobalISel] Translate scalar sequential vecreduce.fadd/fmul as fadd/fmul. (#153966)

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  davemgreen

  authored
  03912a1

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• [gn build] Port e6e874ce8f05

  llvmgnsyncbot

  committed
  f4b5c24

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