stm32: Update components to work with new H7xx HAL.

dpgeorge · dpgeorge · commit 73e8b7e0e4a7 · 2019-07-03T23:40:49.000+10:00
diff --git a/ports/stm32/adc.c b/ports/stm32/adc.c
@@ -110,7 +110,6 @@
 #define ADC_CAL1                ((uint16_t*)(0x1FF1E820))
 #define ADC_CAL2                ((uint16_t*)(0x1FF1E840))
 #define ADC_CAL_BITS            (16)
-#define ADC_CHANNEL_VBAT        ADC_CHANNEL_VBAT_DIV4
 
 #elif defined(STM32L4)
 
@@ -247,7 +246,6 @@ STATIC void adcx_init_periph(ADC_HandleTypeDef *adch, uint32_t resolution) {
     adch->Init.DMAContinuousRequests = DISABLE;
     #elif defined(STM32H7)
     adch->Init.ClockPrescaler        = ADC_CLOCK_SYNC_PCLK_DIV4;
-    adch->Init.BoostMode             = ENABLE;
     adch->Init.ScanConvMode          = DISABLE;
     adch->Init.LowPowerAutoWait      = DISABLE;
     adch->Init.Overrun               = ADC_OVR_DATA_OVERWRITTEN;
diff --git a/ports/stm32/boards/stm32h7xx_hal_conf_base.h b/ports/stm32/boards/stm32h7xx_hal_conf_base.h
@@ -28,6 +28,7 @@
 
 // Include various HAL modules for convenience
 #include "stm32h7xx_hal_dma.h"
+#include "stm32h7xx_hal_mdma.h"
 #include "stm32h7xx_hal_adc.h"
 #include "stm32h7xx_hal_cortex.h"
 #include "stm32h7xx_hal_crc.h"
diff --git a/ports/stm32/mphalport.h b/ports/stm32/mphalport.h
@@ -63,13 +63,8 @@ static inline mp_uint_t mp_hal_ticks_cpu(void) {
 #define mp_hal_pin_input(p)     mp_hal_pin_config((p), MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_NONE, 0)
 #define mp_hal_pin_output(p)    mp_hal_pin_config((p), MP_HAL_PIN_MODE_OUTPUT, MP_HAL_PIN_PULL_NONE, 0)
 #define mp_hal_pin_open_drain(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_OPEN_DRAIN, MP_HAL_PIN_PULL_NONE, 0)
-#if defined(STM32H7)
-#define mp_hal_pin_high(p)      (((p)->gpio->BSRRL) = (p)->pin_mask)
-#define mp_hal_pin_low(p)       (((p)->gpio->BSRRH) = (p)->pin_mask)
-#else
 #define mp_hal_pin_high(p)      (((p)->gpio->BSRR) = (p)->pin_mask)
 #define mp_hal_pin_low(p)       (((p)->gpio->BSRR) = ((p)->pin_mask << 16))
-#endif
 #define mp_hal_pin_od_low(p)    mp_hal_pin_low(p)
 #define mp_hal_pin_od_high(p)   mp_hal_pin_high(p)
 #define mp_hal_pin_read(p)      (((p)->gpio->IDR >> (p)->pin) & 1)
diff --git a/ports/stm32/stm32_it.c b/ports/stm32/stm32_it.c
@@ -378,8 +378,10 @@ void OTG_FS_WKUP_IRQHandler(void) {
 
   OTG_CMD_WKUP_Handler(&pcd_fs_handle);
 
+  #if !defined(STM32H7)
   /* Clear EXTI pending Bit*/
   __HAL_USB_FS_EXTI_CLEAR_FLAG();
+  #endif
 
     IRQ_EXIT(OTG_FS_WKUP_IRQn);
 }
diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c
@@ -40,6 +40,8 @@
 
 #if defined(STM32F4)
 #define UART_RXNE_IS_SET(uart) ((uart)->SR & USART_SR_RXNE)
+#elif defined(STM32H7)
+#define UART_RXNE_IS_SET(uart) ((uart)->ISR & USART_ISR_RXNE_RXFNE)
 #else
 #define UART_RXNE_IS_SET(uart) ((uart)->ISR & USART_ISR_RXNE)
 #endif
diff --git a/ports/stm32/uart.h b/ports/stm32/uart.h
@@ -88,6 +88,8 @@ void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len);
 static inline bool uart_tx_avail(pyb_uart_obj_t *self) {
     #if defined(STM32F4)
     return self->uartx->SR & USART_SR_TXE;
+    #elif defined(STM32H7)
+    return self->uartx->ISR & USART_ISR_TXE_TXFNF;
     #else
     return self->uartx->ISR & USART_ISR_TXE;
     #endif
diff --git a/ports/stm32/usbdev/class/src/usbd_cdc_msc_hid.c b/ports/stm32/usbdev/class/src/usbd_cdc_msc_hid.c
@@ -1129,6 +1129,9 @@ uint8_t USBD_HID_SetNAK(usbd_hid_state_t *hid) {
     // get USBx object from pdev (needed for USBx_OUTEP macro below)
     PCD_HandleTypeDef *hpcd = hid->usbd->pdev->pData;
     USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
+    #if defined(STM32H7)
+    uint32_t USBx_BASE = (uint32_t)USBx;
+    #endif
     // set NAK on HID OUT endpoint
     USBx_OUTEP(HID_OUT_EP_WITH_CDC)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
     return USBD_OK;
@@ -1138,6 +1141,9 @@ uint8_t USBD_HID_ClearNAK(usbd_hid_state_t *hid) {
     // get USBx object from pdev (needed for USBx_OUTEP macro below)
     PCD_HandleTypeDef *hpcd = hid->usbd->pdev->pData;
     USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
+    #if defined(STM32H7)
+    uint32_t USBx_BASE = (uint32_t)USBx;
+    #endif
     // clear NAK on HID OUT endpoint
     USBx_OUTEP(HID_OUT_EP_WITH_CDC)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
     return USBD_OK;

Original file line number	Diff line number	Diff line change
`@@ -378,8 +378,10 @@ void OTG_FS_WKUP_IRQHandler(void) {`
`378`	`378`
`379`	`379`	`OTG_CMD_WKUP_Handler(&pcd_fs_handle);`
`380`	`380`
	`381`	`+ #if !defined(STM32H7)`
`381`	`382`	`/* Clear EXTI pending Bit*/`
`382`	`383`	`__HAL_USB_FS_EXTI_CLEAR_FLAG();`
	`384`	`+ #endif`
`383`	`385`
`384`	`386`	`IRQ_EXIT(OTG_FS_WKUP_IRQn);`
`385`	`387`	`}`