Skip to content

Commit cb10734

Browse files
yn386yn386
committed
stm32: Add STM32U5 support.
This change adds STM32U5 support to the STM32 port. STM32U5A5ZJ: https://www.st.com/ja/microcontrollers-microprocessors/stm32u5a5zj.html Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
1 parent a5d2730 commit cb10734

31 files changed

+822
-107
lines changed

‎ports/stm32/Makefile

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -366,7 +366,7 @@ HAL_SRC_C += $(addprefix $(STM32LIB_HAL_BASE)/Src/stm32$(MCU_SERIES)xx_,\
366366
)
367367
endif
368368

369-
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f4 f7 g0 g4 h5 h7 l0 l1 l4 n6 wb))
369+
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f4 f7 g0 g4 h5 h7 l0 l1 l4 n6 u5 wb))
370370
HAL_SRC_C += $(addprefix $(STM32LIB_HAL_BASE)/Src/stm32$(MCU_SERIES)xx_,\
371371
hal_pcd.c \
372372
hal_pcd_ex.c \
@@ -407,7 +407,7 @@ $(BUILD)/$(STM32LIB_HAL_BASE)/Src/stm32$(MCU_SERIES)xx_hal_mmc.o: CFLAGS += -Wno
407407
endif
408408
endif
409409

410-
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f4 f7 g0 g4 h5 h7 n6))
410+
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f4 f7 g0 g4 h5 h7 n6 u5))
411411
HAL_SRC_C += $(addprefix $(STM32LIB_HAL_BASE)/Src/stm32$(MCU_SERIES)xx_,\
412412
hal_dma_ex.c \
413413
)

‎ports/stm32/adc.c

Lines changed: 44 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -107,13 +107,17 @@
107107
#define ADC_CAL2 ((uint16_t *)(ADC_CAL_ADDRESS + 4))
108108
#define ADC_CAL_BITS (12)
109109

110-
#elif defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32L1) || defined(STM32L4) || defined(STM32N6) || defined(STM32WB)
110+
#elif defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32L1) || defined(STM32L4) || defined(STM32N6) || defined(STM32U5) || defined(STM32WB)
111111

112112
#define ADC_SCALE_V (((float)VREFINT_CAL_VREF) / 1000.0f)
113113
#define ADC_CAL_ADDRESS (VREFINT_CAL_ADDR)
114114
#define ADC_CAL1 (TEMPSENSOR_CAL1_ADDR)
115115
#define ADC_CAL2 (TEMPSENSOR_CAL2_ADDR)
116+
#if defined(STM32U5)
117+
#define ADC_CAL_BITS (14)
118+
#else
116119
#define ADC_CAL_BITS (12) // UM2319/UM2570, __HAL_ADC_CALC_TEMPERATURE: 'corresponds to a resolution of 12 bits'
120+
#endif
117121

118122
#elif defined(STM32H7)
119123

@@ -169,6 +173,8 @@
169173
#elif defined(STM32N6)
170174
// ADC2 VINP 16
171175
#define VBAT_DIV (4)
176+
#elif defined(STM32U5)
177+
#define VBAT_DIV (4)
172178
#else
173179
#error Unsupported processor
174180
#endif
@@ -228,6 +234,14 @@ static inline uint32_t adc_get_internal_channel(uint32_t channel) {
228234
} else if (channel == 18) {
229235
channel = ADC_CHANNEL_VBAT;
230236
}
237+
#elif defined(STM32U5)
238+
if (channel == 0) {
239+
channel = ADC_CHANNEL_VREFINT;
240+
} else if (channel == 18) {
241+
channel = ADC_CHANNEL_VBAT;
242+
} else if (channel == 19) {
243+
channel = ADC_CHANNEL_TEMPSENSOR;
244+
}
231245
#endif
232246
return channel;
233247
}
@@ -242,7 +256,7 @@ static bool is_adcx_channel(int channel) {
242256
// The HAL of STM32L1 defines some channels those may not be available on package
243257
return __HAL_ADC_IS_CHANNEL_INTERNAL(channel)
244258
|| (channel < MP_ARRAY_SIZE(pin_adcall_table) && pin_adcall_table[channel]);
245-
#elif defined(STM32G0) || defined(STM32H7)
259+
#elif defined(STM32G0) || defined(STM32H7) || defined(STM32U5)
246260
return __HAL_ADC_IS_CHANNEL_INTERNAL(channel)
247261
|| IS_ADC_CHANNEL(__HAL_ADC_DECIMAL_NB_TO_CHANNEL(channel));
248262
#elif defined(STM32G4) || defined(STM32L4) || defined(STM32WB)
@@ -263,7 +277,7 @@ static void adc_wait_for_eoc_or_timeout(ADC_HandleTypeDef *adcHandle, int32_t ti
263277
uint32_t tickstart = HAL_GetTick();
264278
#if defined(STM32F4) || defined(STM32F7) || defined(STM32L1)
265279
while ((adcHandle->Instance->SR & ADC_FLAG_EOC) != ADC_FLAG_EOC) {
266-
#elif defined(STM32F0) || defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L4) || defined(STM32N6) || defined(STM32WB)
280+
#elif defined(STM32F0) || defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L4) || defined(STM32N6) || defined(STM32U5) || defined(STM32WB)
267281
while (READ_BIT(adcHandle->Instance->ISR, ADC_FLAG_EOC) != ADC_FLAG_EOC) {
268282
#else
269283
#error Unsupported processor
@@ -297,7 +311,8 @@ static void adcx_clock_enable(ADC_HandleTypeDef *adch) {
297311
if (__HAL_RCC_GET_ADC_SOURCE() == RCC_ADCCLKSOURCE_NONE) {
298312
__HAL_RCC_ADC_CONFIG(RCC_ADCCLKSOURCE_SYSCLK);
299313
}
300-
__HAL_RCC_ADC_CLK_ENABLE();
314+
#elif defined(STM32U5)
315+
__HAL_RCC_ADC12_CLK_ENABLE();
301316
#else
302317
#error Unsupported processor
303318
#endif
@@ -343,8 +358,8 @@ static void adcx_init_periph(ADC_HandleTypeDef *adch, uint32_t resolution) {
343358
adch->Init.LowPowerAutoWait = DISABLE;
344359
adch->Init.DataAlign = ADC_DATAALIGN_RIGHT;
345360
adch->Init.DMAContinuousRequests = DISABLE;
346-
#elif defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32L4) || defined(STM32WB)
347-
#if defined(STM32G4) || defined(STM32H5)
361+
#elif defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32L4) || defined(STM32U5) || defined(STM32WB)
362+
#if defined(STM32G4) || defined(STM32H5) || defined(STM32U5)
348363
adch->Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV16;
349364
#else
350365
adch->Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
@@ -355,6 +370,12 @@ static void adcx_init_periph(ADC_HandleTypeDef *adch, uint32_t resolution) {
355370
adch->Init.OversamplingMode = DISABLE;
356371
adch->Init.DataAlign = ADC_DATAALIGN_RIGHT;
357372
adch->Init.DMAContinuousRequests = DISABLE;
373+
#if defined(STM32U5)
374+
adch->Init.GainCompensation = 0;
375+
adch->Init.TriggerFrequencyMode = ADC_TRIGGER_FREQ_HIGH;
376+
adch->Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
377+
adch->Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
378+
#endif
358379
#elif defined(STM32N6)
359380
adch->Init.GainCompensation = 0;
360381
adch->Init.ScanConvMode = ADC_SCAN_DISABLE;
@@ -370,7 +391,7 @@ static void adcx_init_periph(ADC_HandleTypeDef *adch, uint32_t resolution) {
370391

371392
HAL_ADC_Init(adch);
372393

373-
#if defined(STM32H7)
394+
#if defined(STM32H7) || defined(STM32U5)
374395
HAL_ADCEx_Calibration_Start(adch, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED);
375396
#endif
376397
#if defined(STM32G0)
@@ -401,6 +422,8 @@ static void adc_config_channel(ADC_HandleTypeDef *adc_handle, uint32_t channel)
401422
if (__HAL_ADC_IS_CHANNEL_INTERNAL(channel) == 0) {
402423
channel = __HAL_ADC_DECIMAL_NB_TO_CHANNEL(channel);
403424
}
425+
#elif defined(STM32U5)
426+
sConfig.Rank = ADC_REGULAR_RANK_1;
404427
#else
405428
sConfig.Rank = 1;
406429
#endif
@@ -457,6 +480,15 @@ static void adc_config_channel(ADC_HandleTypeDef *adc_handle, uint32_t channel)
457480
sConfig.OffsetSignedSaturation = DISABLE;
458481
sConfig.OffsetSaturation = DISABLE;
459482
sConfig.OffsetSign = ADC_OFFSET_SIGN_POSITIVE;
483+
#elif defined(STM32U5)
484+
if (__HAL_ADC_IS_CHANNEL_INTERNAL(channel)) {
485+
sConfig.SamplingTime = ADC_SAMPLETIME_391CYCLES_5;
486+
} else {
487+
sConfig.SamplingTime = ADC4_SAMPLETIME_3CYCLES_5;
488+
}
489+
sConfig.SingleDiff = ADC_SINGLE_ENDED;
490+
sConfig.OffsetNumber = ADC_OFFSET_NONE;
491+
sConfig.Offset = 0;
460492
#else
461493
#error Unsupported processor
462494
#endif
@@ -678,7 +710,7 @@ static mp_obj_t adc_read_timed(mp_obj_t self_in, mp_obj_t buf_in, mp_obj_t freq_
678710
// for subsequent samples we can just set the "start sample" bit
679711
#if defined(STM32F4) || defined(STM32F7) || defined(STM32L1)
680712
self->handle.Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
681-
#elif defined(STM32F0) || defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L4) || defined(STM32N6) || defined(STM32WB)
713+
#elif defined(STM32F0) || defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L4) || defined(STM32N6) || defined(STM32U5) || defined(STM32WB)
682714
SET_BIT(self->handle.Instance->CR, ADC_CR_ADSTART);
683715
#else
684716
#error Unsupported processor
@@ -788,7 +820,7 @@ static mp_obj_t adc_read_timed_multi(mp_obj_t adc_array_in, mp_obj_t buf_array_i
788820
// ADC is started: set the "start sample" bit
789821
#if defined(STM32F4) || defined(STM32F7) || defined(STM32L1)
790822
adc->handle.Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
791-
#elif defined(STM32F0) || defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L4) || defined(STM32N6) || defined(STM32WB)
823+
#elif defined(STM32F0) || defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L4) || defined(STM32N6) || defined(STM32U5) || defined(STM32WB)
792824
SET_BIT(adc->handle.Instance->CR, ADC_CR_ADSTART);
793825
#else
794826
#error Unsupported processor
@@ -939,7 +971,7 @@ float adc_read_core_temp_float(ADC_HandleTypeDef *adcHandle) {
939971
return 0.0f; // TODO
940972
#else
941973

942-
#if defined(STM32G4) || defined(STM32L1) || defined(STM32L4)
974+
#if defined(STM32G4) || defined(STM32L1) || defined(STM32L4) || defined(STM32U5)
943975
// Update the reference correction factor before reading tempsensor
944976
// because TS_CAL1 and TS_CAL2 of STM32G4,L1/L4 are at VDDA=3.0V
945977
adc_read_core_vref(adcHandle);
@@ -953,7 +985,7 @@ float adc_read_core_temp_float(ADC_HandleTypeDef *adcHandle) {
953985
return 0;
954986
}
955987
float core_temp_avg_slope = (*ADC_CAL2 - *ADC_CAL1) / 100.0f;
956-
#elif defined(STM32H5) || defined(STM32WB)
988+
#elif defined(STM32H5) || defined(STM32U5) || defined(STM32WB)
957989
int32_t raw_value = adc_config_and_read_ref(adcHandle, ADC_CHANNEL_TEMPSENSOR);
958990
float core_temp_avg_slope = (*ADC_CAL2 - *ADC_CAL1) / 100.0f;
959991
#else
@@ -966,7 +998,7 @@ float adc_read_core_temp_float(ADC_HandleTypeDef *adcHandle) {
966998
}
967999

9681000
float adc_read_core_vbat(ADC_HandleTypeDef *adcHandle) {
969-
#if defined(STM32G4) || defined(STM32L4)
1001+
#if defined(STM32G4) || defined(STM32L4) || defined(STM32U5)
9701002
// Update the reference correction factor before reading tempsensor
9711003
// because VREFINT of STM32G4,L4 is at VDDA=3.0V
9721004
adc_read_core_vref(adcHandle);

‎ports/stm32/adc.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,8 @@ static inline void adc_deselect_vbat(ADC_TypeDef *adc, uint32_t channel) {
5656
adc_common = adc == ADC3 ? ADC3_COMMON : ADC12_COMMON;
5757
#elif defined(STM32L4)
5858
adc_common = __LL_ADC_COMMON_INSTANCE(0);
59+
#elif defined(STM32U5)
60+
adc_common = ADC12_COMMON;
5961
#elif defined(STM32WL)
6062
adc_common = ADC_COMMON;
6163
#endif

0 commit comments

Comments
 (0)