Skip to content

Commit 2c7a123

Browse files
committed
Do not enable asm with clang
clang pretends to be gcc 4.2.0 which means we will use inline asm for no reason, instead of builtins on clang when possible. Signed-off-by: Khem Raj <raj.khem@gmail.com>
1 parent 6a5298a commit 2c7a123

File tree

8 files changed

+104
-104
lines changed

8 files changed

+104
-104
lines changed

3rdparty/carotene/src/channel_extract.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -231,7 +231,7 @@ void extract4(const Size2D &size,
231231
srcStride == dst2Stride && \
232232
srcStride == dst3Stride &&
233233

234-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7
234+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7 && !defined(__clang__)
235235

236236
#define SPLIT_ASM2(sgn, bits) __asm__ ( \
237237
"vld2." #bits " {d0, d2}, [%[in0]] \n\t" \
@@ -351,7 +351,7 @@ void extract4(const Size2D &size,
351351
} \
352352
}
353353

354-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7
354+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7 && !defined(__clang__)
355355

356356
#define ALPHA_QUAD(sgn, bits) { \
357357
internal::prefetch(src + sj); \

3rdparty/carotene/src/channels_combine.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -77,7 +77,7 @@ namespace CAROTENE_NS {
7777
dstStride == src2Stride && \
7878
dstStride == src3Stride &&
7979

80-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7
80+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7 && !defined(__clang__)
8181

8282
#define MERGE_ASM2(sgn, bits) __asm__ ( \
8383
"vld1." #bits " {d0-d1}, [%[in0]] \n\t" \

3rdparty/carotene/src/colorconvert.cpp

Lines changed: 39 additions & 39 deletions
Large diffs are not rendered by default.

3rdparty/carotene/src/convert.cpp

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,7 @@ CVT_FUNC(u8, s8, 16,
101101
}
102102
})
103103

104-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7
104+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7 && !defined(__clang__)
105105
CVT_FUNC(u8, u16, 16,
106106
register uint8x16_t zero0 asm ("q1") = vmovq_n_u8(0);,
107107
{
@@ -135,7 +135,7 @@ CVT_FUNC(u8, u16, 16,
135135
})
136136
#endif
137137

138-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7
138+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7 && !defined(__clang__)
139139
CVT_FUNC(u8, s32, 16,
140140
register uint8x16_t zero0 asm ("q1") = vmovq_n_u8(0);
141141
register uint8x16_t zero1 asm ("q2") = vmovq_n_u8(0);
@@ -173,7 +173,7 @@ CVT_FUNC(u8, s32, 16,
173173
})
174174
#endif
175175

176-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
176+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
177177
CVT_FUNC(u8, f32, 16,
178178
,
179179
{
@@ -248,7 +248,7 @@ CVT_FUNC(s8, u8, 16,
248248
}
249249
})
250250

251-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7
251+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7 && !defined(__clang__)
252252
CVT_FUNC(s8, u16, 16,
253253
register uint8x16_t zero0 asm ("q1") = vmovq_n_u8(0);,
254254
{
@@ -284,7 +284,7 @@ CVT_FUNC(s8, u16, 16,
284284
})
285285
#endif
286286

287-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
287+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
288288
CVT_FUNC(s8, s16, 16,
289289
,
290290
{
@@ -323,7 +323,7 @@ CVT_FUNC(s8, s16, 16,
323323
})
324324
#endif
325325

326-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7
326+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7 && !defined(__clang__)
327327
CVT_FUNC(s8, s32, 16,
328328
,
329329
{
@@ -377,7 +377,7 @@ CVT_FUNC(s8, s32, 16,
377377
})
378378
#endif
379379

380-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
380+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
381381
CVT_FUNC(s8, f32, 16,
382382
,
383383
{
@@ -440,7 +440,7 @@ CVT_FUNC(s8, f32, 16,
440440
})
441441
#endif
442442

443-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
443+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
444444
CVT_FUNC(u16, u8, 16,
445445
,
446446
{
@@ -479,7 +479,7 @@ CVT_FUNC(u16, u8, 16,
479479
})
480480
#endif
481481

482-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
482+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
483483
CVT_FUNC(u16, s8, 16,
484484
register uint8x16_t v127 asm ("q4") = vmovq_n_u8(127);,
485485
{
@@ -522,7 +522,7 @@ CVT_FUNC(u16, s8, 16,
522522
})
523523
#endif
524524

525-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7
525+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7 && !defined(__clang__)
526526
CVT_FUNC(u16, s16, 8,
527527
register uint16x8_t v32767 asm ("q4") = vmovq_n_u16(0x7FFF);,
528528
{
@@ -555,7 +555,7 @@ CVT_FUNC(u16, s16, 8,
555555
})
556556
#endif
557557

558-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7
558+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7 && !defined(__clang__)
559559
CVT_FUNC(u16, s32, 8,
560560
register uint16x8_t zero0 asm ("q1") = vmovq_n_u16(0);,
561561
{
@@ -589,7 +589,7 @@ CVT_FUNC(u16, s32, 8,
589589
})
590590
#endif
591591

592-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
592+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
593593
CVT_FUNC(u16, f32, 8,
594594
,
595595
{
@@ -633,7 +633,7 @@ CVT_FUNC(u16, f32, 8,
633633
})
634634
#endif
635635

636-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
636+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
637637
CVT_FUNC(s16, u8, 16,
638638
,
639639
{
@@ -672,7 +672,7 @@ CVT_FUNC(s16, u8, 16,
672672
})
673673
#endif
674674

675-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
675+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
676676
CVT_FUNC(s16, s8, 16,
677677
,
678678
{
@@ -711,7 +711,7 @@ CVT_FUNC(s16, s8, 16,
711711
})
712712
#endif
713713

714-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7
714+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 7 && !defined(__clang__)
715715
CVT_FUNC(s16, u16, 8,
716716
register int16x8_t vZero asm ("q4") = vmovq_n_s16(0);,
717717
{
@@ -747,7 +747,7 @@ CVT_FUNC(s16, u16, 8,
747747
})
748748
#endif
749749

750-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
750+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
751751
CVT_FUNC(s16, s32, 8,
752752
,
753753
{
@@ -786,7 +786,7 @@ CVT_FUNC(s16, s32, 8,
786786
})
787787
#endif
788788

789-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
789+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
790790
CVT_FUNC(s16, f32, 8,
791791
,
792792
{
@@ -829,7 +829,7 @@ CVT_FUNC(s16, f32, 8,
829829
})
830830
#endif
831831

832-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
832+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
833833
CVT_FUNC(s32, u8, 8,
834834
,
835835
{
@@ -870,7 +870,7 @@ CVT_FUNC(s32, u8, 8,
870870
})
871871
#endif
872872

873-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
873+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
874874
CVT_FUNC(s32, s8, 8,
875875
,
876876
{
@@ -911,7 +911,7 @@ CVT_FUNC(s32, s8, 8,
911911
})
912912
#endif
913913

914-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
914+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
915915
CVT_FUNC(s32, u16, 8,
916916
,
917917
{
@@ -950,7 +950,7 @@ CVT_FUNC(s32, u16, 8,
950950
})
951951
#endif
952952

953-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
953+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
954954
CVT_FUNC(s32, s16, 8,
955955
,
956956
{
@@ -989,7 +989,7 @@ CVT_FUNC(s32, s16, 8,
989989
})
990990
#endif
991991

992-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
992+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
993993
CVT_FUNC(s32, f32, 8,
994994
,
995995
{
@@ -1034,7 +1034,7 @@ CVT_FUNC(s32, f32, 8,
10341034
})
10351035
#endif
10361036

1037-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
1037+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
10381038
CVT_FUNC(f32, u8, 8,
10391039
register float32x4_t vmult asm ("q0") = vdupq_n_f32((float)(1 << 16));
10401040
register uint32x4_t vmask asm ("q1") = vdupq_n_u32(1<<16);,
@@ -1101,7 +1101,7 @@ CVT_FUNC(f32, u8, 8,
11011101
})
11021102
#endif
11031103

1104-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
1104+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
11051105
CVT_FUNC(f32, s8, 8,
11061106
register float32x4_t vhalf asm ("q0") = vdupq_n_f32(0.5f);,
11071107
{
@@ -1153,7 +1153,7 @@ CVT_FUNC(f32, s8, 8,
11531153
})
11541154
#endif
11551155

1156-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
1156+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
11571157
CVT_FUNC(f32, u16, 8,
11581158
register float32x4_t vhalf asm ("q0") = vdupq_n_f32(0.5f);,
11591159
{
@@ -1212,7 +1212,7 @@ CVT_FUNC(f32, u16, 8,
12121212
})
12131213
#endif
12141214

1215-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
1215+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
12161216
CVT_FUNC(f32, s16, 8,
12171217
register float32x4_t vhalf asm ("q0") = vdupq_n_f32(0.5f);,
12181218
{
@@ -1271,7 +1271,7 @@ CVT_FUNC(f32, s16, 8,
12711271
})
12721272
#endif
12731273

1274-
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6
1274+
#if !defined(__aarch64__) && defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ < 6 && !defined(__clang__)
12751275
CVT_FUNC(f32, s32, 8,
12761276
register float32x4_t vhalf asm ("q0") = vdupq_n_f32(0.5f);,
12771277
{

0 commit comments

Comments
 (0)