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Fix the check for regparm in FunctionType::ExtInfo
`getHasRegParm()` was working under the assumption that the RegParm bits are the last field, which is no longer true, after adding the `NoCfCheck` and `CmseNSCall` fields. This causes a spurious "regparm 0" attribute to appear when a function type is declared with either `__attribute__((nocf_check))` or `__attribute__((cmse_nonsecure_call))`. Differential Revision: https://reviews.llvm.org/D77270
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clang/include/clang/AST/Type.h

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3518,13 +3518,12 @@ class FunctionType : public Type {
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enum { NoReturnMask = 0x20 };
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enum { ProducesResultMask = 0x40 };
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enum { NoCallerSavedRegsMask = 0x80 };
3521-
enum { NoCfCheckMask = 0x800 };
3522-
enum { CmseNSCallMask = 0x1000 };
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enum {
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RegParmMask = ~(CallConvMask | NoReturnMask | ProducesResultMask |
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NoCallerSavedRegsMask | NoCfCheckMask | CmseNSCallMask),
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RegParmMask = 0x700,
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RegParmOffset = 8
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}; // Assumed to be the last field
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};
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enum { NoCfCheckMask = 0x800 };
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enum { CmseNSCallMask = 0x1000 };
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uint16_t Bits = CC_C;
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ExtInfo(unsigned Bits) : Bits(static_cast<uint16_t>(Bits)) {}
@@ -3557,7 +3556,7 @@ class FunctionType : public Type {
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bool getCmseNSCall() const { return Bits & CmseNSCallMask; }
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bool getNoCallerSavedRegs() const { return Bits & NoCallerSavedRegsMask; }
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bool getNoCfCheck() const { return Bits & NoCfCheckMask; }
3560-
bool getHasRegParm() const { return (Bits >> RegParmOffset) != 0; }
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bool getHasRegParm() const { return ((Bits & RegParmMask) >> RegParmOffset) != 0; }
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unsigned getRegParm() const {
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unsigned RegParm = (Bits & RegParmMask) >> RegParmOffset;

clang/test/AST/spurious-regparm.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,4 @@
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// RUN: %clang_cc1 -triple armv8.1m.main-eabi -mcmse -fsyntax-only %s -ast-dump | FileCheck %s
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// REQUIRES: arm-registered-target
3+
typedef int (*fn_t)(int) __attribute__((cmse_nonsecure_call));
4+
// CHECK-NOT: regparm 0

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