[llvm-objdump] Print target address with evaluateMemoryOperandAddress()

MaskRay · MaskRay · commit 3c9c9c1768fd · 2020-04-27T09:43:51.000-07:00
D63847 added `MCInstrAnalysis::evaluateMemoryOperandAddress()`. This patch leverages the feature to print the target addresses for evaluable instructions. ``` -400a: movl 4080(%rip), %eax +400a: movl 4080(%rip), %eax # 5000 <data1> ``` This patch also deletes `MIA->isCall(Inst) || MIA->isUnconditionalBranch(Inst) || MIA->isConditionalBranch(Inst)` which is used to guard `MCInstrAnalysis::evaluateBranch()` Reviewed By: jhenderson, skan Differential Revision: https://reviews.llvm.org/D78776
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
@@ -266,7 +266,9 @@ class ARMMCInstrAnalysis : public MCInstrAnalysis {
   bool evaluateBranch(const MCInst &Inst, uint64_t Addr,
                       uint64_t Size, uint64_t &Target) const override {
     // We only handle PCRel branches for now.
-    if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL)
+    if (Inst.getNumOperands() == 0 ||
+        Info->get(Inst.getOpcode()).OpInfo[0].OperandType !=
+            MCOI::OPERAND_PCREL)
       return false;
 
     int64_t Imm = Inst.getOperand(0).getImm();
@@ -285,6 +287,8 @@ class ThumbMCInstrAnalysis : public ARMMCInstrAnalysis {
     switch (Inst.getOpcode()) {
     default:
       OpId = 0;
+      if (Inst.getNumOperands() == 0)
+        return false;
       break;
     case ARM::MVE_WLSTP_8:
     case ARM::MVE_WLSTP_16:
diff --git a/llvm/test/MC/X86/tlsdesc-64.s b/llvm/test/MC/X86/tlsdesc-64.s
@@ -9,7 +9,7 @@
 
 # SYM: TLS GLOBAL DEFAULT UND a
 
-# CHECK:      0: leaq (%rip), %rax
+# CHECK:      0: leaq (%rip), %rax  # 7 <{{.*}}>
 # CHECK-NEXT:   0000000000000003: R_X86_64_GOTPC32_TLSDESC a-0x4
 # CHECK-NEXT: 7: callq *(%rax)
 # CHECK-NEXT:   0000000000000007: R_X86_64_TLSDESC_CALL a
diff --git a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-references.yaml b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-references.yaml
@@ -2,10 +2,12 @@
 # RUN: yaml2obj %s --docnum=1 -o %t
 # RUN: llvm-objdump %t -d | FileCheck %s --check-prefix=EXEC
 
-# EXEC: Disassembly of section .text1:
-# EXEC:     4000: e8 00 00 00 00                callq   0x4005 <third>
-# EXEC: Disassembly of section .text2:
-# EXEC:     4005: e8 12 34 56 78                callq   0x7856741c <fourth+0x78563412>
+# EXEC-LABEL: <first>:
+# EXEC-NEXT:   4000: e8 00 00 00 00                callq   0x4005 <third>
+# EXEC-LABEL: <third>:
+# EXEC-NEXT:   4005: e8 12 34 56 78                callq   0x7856741c <data1+0x7856241c>
+# EXEC-LABEL: <fourth>:
+# EXEC-NEXT:   400a: 8b 05 f0 0f 00 00             movl    4080(%rip), %eax  # 5000 <data1>
 
 --- !ELF
 FileHeader:
@@ -28,6 +30,11 @@ Sections:
     Type:    SHT_PROGBITS
     Flags:   [SHF_ALLOC, SHF_EXECINSTR]
     Address: 0x400A
+    Content: '8b05f00f0000' # Case 3: Memory operands
+  - Name:    .data
+    Type:    SHT_PROGBITS
+    Flags:   [SHF_ALLOC, SHF_WRITE]
+    Address: 0x5000
 Symbols:
   - Name:    first
     Section: .text1
@@ -41,6 +48,9 @@ Symbols:
   - Name:    fourth
     Section: .text3
     Value:   0x400A
+  - Name:    data1
+    Section: .data
+    Value:   0x5000
 
 # RUN: yaml2obj %s --docnum=2 -o %t.o
 # RUN: llvm-objdump %t.o -d | FileCheck %s --check-prefix=REL
diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp
@@ -1513,13 +1513,22 @@ static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
         Comments.clear();
 
         // If disassembly has failed, avoid analysing invalid/incomplete
-        // instruction information. Otherwise, try to resolve the target of a
-        // call, tail call, etc. to a specific symbol.
-        if (Disassembled && MIA &&
-            (MIA->isCall(Inst) || MIA->isUnconditionalBranch(Inst) ||
-             MIA->isConditionalBranch(Inst))) {
+        // instruction information. Otherwise, try to resolve the target address
+        // (jump target or memory operand address) and print it on the right of
+        // the instruction.
+        if (Disassembled && MIA) {
           uint64_t Target;
-          if (MIA->evaluateBranch(Inst, SectionAddr + Index, Size, Target)) {
+          bool PrintTarget =
+              MIA->evaluateBranch(Inst, SectionAddr + Index, Size, Target);
+          if (!PrintTarget)
+            if (Optional<uint64_t> MaybeTarget =
+                    MIA->evaluateMemoryOperandAddress(Inst, SectionAddr + Index,
+                                                      Size)) {
+              Target = *MaybeTarget;
+              PrintTarget = true;
+              outs() << "  # " << Twine::utohexstr(Target);
+            }
+          if (PrintTarget) {
             // In a relocatable object, the target's section must reside in
             // the same section as the call instruction or it is accessed
             // through a relocation.
