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[SveEmitter] Add builtins for bitcount operations
This patch adds builtins for svcls, svclz and svcnt. For merging (_m), zeroing (_z) and don't-care (_x) predication.
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‎clang/include/clang/Basic/arm_sve.td

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@@ -702,6 +702,19 @@ def SVWHILELS_U64 : SInst<"svwhilele_{d}[_{1}]", "Pnn", "PUcPUsPUiPUl", MergeNon
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def SVWHILELT_S32 : SInst<"svwhilelt_{d}[_{1}]", "Pkk", "PcPsPiPl", MergeNone, "aarch64_sve_whilelt", [IsOverloadWhile]>;
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def SVWHILELT_S64 : SInst<"svwhilelt_{d}[_{1}]", "Pll", "PcPsPiPl", MergeNone, "aarch64_sve_whilelt", [IsOverloadWhile]>;
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////////////////////////////////////////////////////////////////////////////////
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// Counting bit
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multiclass SInstCLS<string name, string types, string intrinsic, list<FlagType> flags=[]> {
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def _M : SInst<name # "[_{d}]", "uuPd", types, MergeOp1, intrinsic, flags>;
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def _X : SInst<name # "[_{d}]", "uPd", types, MergeAnyExp, intrinsic, flags>;
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def _Z : SInst<name # "[_{d}]", "uPd", types, MergeZeroExp, intrinsic, flags>;
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}
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defm SVCLS : SInstCLS<"svcls", "csil", "aarch64_sve_cls">;
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defm SVCLZ : SInstCLS<"svclz", "csilUcUsUiUl", "aarch64_sve_clz">;
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defm SVCNT : SInstCLS<"svcnt", "csilUcUsUiUlhfd", "aarch64_sve_cnt">;
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////////////////////////////////////////////////////////////////////////////////
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// Floating-point arithmetic
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‎clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c

Lines changed: 116 additions & 0 deletions
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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#include <arm_sve.h>
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#ifdef SVE_OVERLOADED_FORMS
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// A simple used,unused... macro, long enough to represent any SVE builtin.
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#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
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#else
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#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
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#endif
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svuint8_t test_svcls_s8_z(svbool_t pg, svint8_t op)
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{
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// CHECK-LABEL: test_svcls_s8_z
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cls.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> %pg, <vscale x 16 x i8> %op)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s8,_z,)(pg, op);
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}
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svuint16_t test_svcls_s16_z(svbool_t pg, svint16_t op)
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{
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// CHECK-LABEL: test_svcls_s16_z
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cls.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s16,_z,)(pg, op);
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}
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svuint32_t test_svcls_s32_z(svbool_t pg, svint32_t op)
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{
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// CHECK-LABEL: test_svcls_s32_z
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cls.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s32,_z,)(pg, op);
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}
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svuint64_t test_svcls_s64_z(svbool_t pg, svint64_t op)
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{
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// CHECK-LABEL: test_svcls_s64_z
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cls.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s64,_z,)(pg, op);
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}
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svuint8_t test_svcls_s8_m(svuint8_t inactive, svbool_t pg, svint8_t op)
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{
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// CHECK-LABEL: test_svcls_s8_m
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cls.nxv16i8(<vscale x 16 x i8> %inactive, <vscale x 16 x i1> %pg, <vscale x 16 x i8> %op)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s8,_m,)(inactive, pg, op);
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}
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svuint16_t test_svcls_s16_m(svuint16_t inactive, svbool_t pg, svint16_t op)
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{
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// CHECK-LABEL: test_svcls_s16_m
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cls.nxv8i16(<vscale x 8 x i16> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s16,_m,)(inactive, pg, op);
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}
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svuint32_t test_svcls_s32_m(svuint32_t inactive, svbool_t pg, svint32_t op)
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{
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// CHECK-LABEL: test_svcls_s32_m
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cls.nxv4i32(<vscale x 4 x i32> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s32,_m,)(inactive, pg, op);
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}
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svuint64_t test_svcls_s64_m(svuint64_t inactive, svbool_t pg, svint64_t op)
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{
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// CHECK-LABEL: test_svcls_s64_m
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cls.nxv2i64(<vscale x 2 x i64> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s64,_m,)(inactive, pg, op);
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}
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svuint8_t test_svcls_s8_x(svbool_t pg, svint8_t op)
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{
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// CHECK-LABEL: test_svcls_s8_x
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cls.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> %pg, <vscale x 16 x i8> %op)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s8,_x,)(pg, op);
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}
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svuint16_t test_svcls_s16_x(svbool_t pg, svint16_t op)
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{
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// CHECK-LABEL: test_svcls_s16_x
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cls.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s16,_x,)(pg, op);
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}
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svuint32_t test_svcls_s32_x(svbool_t pg, svint32_t op)
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{
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// CHECK-LABEL: test_svcls_s32_x
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cls.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s32,_x,)(pg, op);
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}
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svuint64_t test_svcls_s64_x(svbool_t pg, svint64_t op)
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{
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// CHECK-LABEL: test_svcls_s64_x
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cls.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svcls,_s64,_x,)(pg, op);
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}

‎clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c

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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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#include <arm_sve.h>
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#ifdef SVE_OVERLOADED_FORMS
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// A simple used,unused... macro, long enough to represent any SVE builtin.
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#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
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#else
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#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
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#endif
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svuint8_t test_svclz_s8_z(svbool_t pg, svint8_t op)
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{
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// CHECK-LABEL: test_svclz_s8_z
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> %pg, <vscale x 16 x i8> %op)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s8,_z,)(pg, op);
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}
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svuint16_t test_svclz_s16_z(svbool_t pg, svint16_t op)
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{
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// CHECK-LABEL: test_svclz_s16_z
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s16,_z,)(pg, op);
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}
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svuint32_t test_svclz_s32_z(svbool_t pg, svint32_t op)
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{
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// CHECK-LABEL: test_svclz_s32_z
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s32,_z,)(pg, op);
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}
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svuint64_t test_svclz_s64_z(svbool_t pg, svint64_t op)
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{
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// CHECK-LABEL: test_svclz_s64_z
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s64,_z,)(pg, op);
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}
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svuint8_t test_svclz_u8_z(svbool_t pg, svuint8_t op)
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{
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// CHECK-LABEL: test_svclz_u8_z
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> %pg, <vscale x 16 x i8> %op)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u8,_z,)(pg, op);
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}
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svuint16_t test_svclz_u16_z(svbool_t pg, svuint16_t op)
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{
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// CHECK-LABEL: test_svclz_u16_z
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u16,_z,)(pg, op);
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}
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svuint32_t test_svclz_u32_z(svbool_t pg, svuint32_t op)
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{
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// CHECK-LABEL: test_svclz_u32_z
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u32,_z,)(pg, op);
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}
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svuint64_t test_svclz_u64_z(svbool_t pg, svuint64_t op)
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{
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// CHECK-LABEL: test_svclz_u64_z
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u64,_z,)(pg, op);
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}
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svuint8_t test_svclz_s8_m(svuint8_t inactive, svbool_t pg, svint8_t op)
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{
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// CHECK-LABEL: test_svclz_s8_m
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> %inactive, <vscale x 16 x i1> %pg, <vscale x 16 x i8> %op)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s8,_m,)(inactive, pg, op);
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}
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svuint16_t test_svclz_s16_m(svuint16_t inactive, svbool_t pg, svint16_t op)
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{
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// CHECK-LABEL: test_svclz_s16_m
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s16,_m,)(inactive, pg, op);
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}
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svuint32_t test_svclz_s32_m(svuint32_t inactive, svbool_t pg, svint32_t op)
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{
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// CHECK-LABEL: test_svclz_s32_m
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s32,_m,)(inactive, pg, op);
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}
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svuint64_t test_svclz_s64_m(svuint64_t inactive, svbool_t pg, svint64_t op)
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{
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// CHECK-LABEL: test_svclz_s64_m
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s64,_m,)(inactive, pg, op);
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}
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svuint8_t test_svclz_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op)
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{
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// CHECK-LABEL: test_svclz_u8_m
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> %inactive, <vscale x 16 x i1> %pg, <vscale x 16 x i8> %op)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u8,_m,)(inactive, pg, op);
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}
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svuint16_t test_svclz_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op)
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{
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// CHECK-LABEL: test_svclz_u16_m
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u16,_m,)(inactive, pg, op);
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}
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svuint32_t test_svclz_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op)
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{
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// CHECK-LABEL: test_svclz_u32_m
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u32,_m,)(inactive, pg, op);
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}
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svuint64_t test_svclz_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op)
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{
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// CHECK-LABEL: test_svclz_u64_m
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u64,_m,)(inactive, pg, op);
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}
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svuint8_t test_svclz_s8_x(svbool_t pg, svint8_t op)
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{
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// CHECK-LABEL: test_svclz_s8_x
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> %pg, <vscale x 16 x i8> %op)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s8,_x,)(pg, op);
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}
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svuint16_t test_svclz_s16_x(svbool_t pg, svint16_t op)
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{
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// CHECK-LABEL: test_svclz_s16_x
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s16,_x,)(pg, op);
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}
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svuint32_t test_svclz_s32_x(svbool_t pg, svint32_t op)
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{
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// CHECK-LABEL: test_svclz_s32_x
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s32,_x,)(pg, op);
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}
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svuint64_t test_svclz_s64_x(svbool_t pg, svint64_t op)
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{
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// CHECK-LABEL: test_svclz_s64_x
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_s64,_x,)(pg, op);
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}
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svuint8_t test_svclz_u8_x(svbool_t pg, svuint8_t op)
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{
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// CHECK-LABEL: test_svclz_u8_x
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> %pg, <vscale x 16 x i8> %op)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u8,_x,)(pg, op);
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}
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svuint16_t test_svclz_u16_x(svbool_t pg, svuint16_t op)
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{
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// CHECK-LABEL: test_svclz_u16_x
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u16,_x,)(pg, op);
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}
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svuint32_t test_svclz_u32_x(svbool_t pg, svuint32_t op)
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{
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// CHECK-LABEL: test_svclz_u32_x
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u32,_x,)(pg, op);
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}
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svuint64_t test_svclz_u64_x(svbool_t pg, svuint64_t op)
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{
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// CHECK-LABEL: test_svclz_u64_x
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svclz,_u64,_x,)(pg, op);
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}

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