Skip to content

Commit f8ed27f

Browse files
committed
ReleaseNotes from Sam Parker
llvm-svn: 370318
1 parent a384ddb commit f8ed27f

File tree

1 file changed

+5
-0
lines changed

1 file changed

+5
-0
lines changed

llvm/docs/ReleaseNotes.rst

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,9 @@ Non-comprehensive list of changes in this release
6060
* The ORCv1 JIT API has been deprecated. Please see
6161
`Transitioning from ORCv1 to ORCv2 <ORCv2.html#transitioning-from-orcv1-to-orcv2>`_.
6262

63+
* Support for target-independent hardware loops in IR has been added, with
64+
PowerPC and Arm implementations.
65+
6366
.. NOTE
6467
If you would like to document a larger change, then you can add a
6568
subsection about it right here. You can copy the following boilerplate
@@ -126,6 +129,8 @@ Changes to the ARM Backend
126129
tune for cores where this gives a benefit too: Cortex-M3, SC300, Cortex-M33
127130
and Cortex-M35P.
128131

132+
* Code generation support for M-profile low-overhead loops.
133+
129134

130135
Changes to the MIPS Target
131136
--------------------------

0 commit comments

Comments
 (0)