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chromium / external / github.com / llvm-mirror / llvm / refs/heads/testing / lib
  1. dcf64df [ThinLTO] Ensure sanitizer passes are run by Teresa Johnson · 8 years ago
  2. 9799e6f [X86] Don't call validateInstruction from MatchAndEmitInstruction when MatchingInlineAsm is set. The MCInst won't be populated. by Craig Topper · 8 years ago
  3. ca3cf87 [ValueTracking] Use APInt::isNullValue/isOneValue which are more efficient for large APInts. by Craig Topper · 8 years ago
  4. 40486d7 [WebAssembly] Call signExtend to get sign extended register by Dan Gohman · 8 years ago
  5. 8e0d3d4 [WebAssembly] Revise the strategy for inline asm. by Dan Gohman · 8 years ago
  6. cf89e1c NFC: Rename MCSafeSEHFragment to MCSymbolIdFragment by Adrian McCarthy · 8 years ago
  7. 27b6b31 Handle inlined variables in SelectionDAGBuilder::EmitFuncArgumentDbgValue(). by Adrian Prantl · 8 years ago
  8. da781c7 [RISCV] Initial support for function calls by Alex Bradbury · 8 years ago
  9. eacca30 [RISCV] Codegen for conditional branches by Alex Bradbury · 8 years ago
  10. 6c9938c [RISCV] Codegen support for memory operations on global addresses by Alex Bradbury · 8 years ago
  11. 21ae2e7 [RISCV] Codegen support for memory operations by Alex Bradbury · 8 years ago
  12. c5abad3 [RISCV] Codegen support for materializing constants by Alex Bradbury · 8 years ago
  13. 96342eb [Analysis] Fix merging TBAA tags with different final access types by Ivan A. Kosarev · 8 years ago
  14. d036c9c [mips] Guard indirect and tailcall pseudo instructions correctly. by Simon Dardis · 8 years ago
  15. 4514930 BasicAA: fix bug where we would return partialalias instead of noalias by Nuno Lopes · 8 years ago
  16. 4d211ca [NFCI] Ensure TargetOpcode::* are compatible with guessInstructionProperties=0 by Alex Bradbury · 8 years ago
  17. 19b50e8 DAG: Add computeKnownBitsForFrameIndex by Matt Arsenault · 8 years ago
  18. 600fc9c Revert "[CGP] Enable extending scope of optimizeMemoryInst" by Serguei Katkov · 8 years ago
  19. 2c8a33a [CGP] Enable extending scope of optimizeMemoryInst by Serguei Katkov · 8 years ago
  20. d550a31 [X86] Add patterns to fold EVEX store with EVEX encoded vcvtps2ph instructions. Remove bad pattern that had vf432 vcvtps2ph storing 128-bits. by Craig Topper · 8 years ago
  21. c30df5f [X86] Allow legacy vcvtps2ph intrinsics to select EVEX encoded instructions. Rely on EVEX->VEX to convert back. by Craig Topper · 8 years ago
  22. 14c6360 Convert FileOutputBuffer::commit to Error. by Rafael Espindola · 8 years ago
  23. aeaece7 Revert "Reapply: Allow yaml2obj to order implicit sections for ELF" by Dave Lee · 8 years ago
  24. 0fa582d Convert FileOutputBuffer to Expected. NFC. by Rafael Espindola · 8 years ago
  25. 4831923 Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering by David Blaikie · 8 years ago
  26. 9fd7184 Reapply: Allow yaml2obj to order implicit sections for ELF by Dave Lee · 8 years ago
  27. a932c3f AMDGPU: Set correct sched model on v_mad_u64_u32 by Matt Arsenault · 8 years ago
  28. cee0476 Revert rL317618 by Mitch Phillips · 8 years ago
  29. ea30756 Attribute nonlazybind should not affect calls to functions with hidden visibility. by Sriraman Tallam · 8 years ago
  30. 7c6de05 Revert "Allow yaml2obj to order implicit sections for ELF" by Dave Lee · 8 years ago
  31. d8660fa [NVPTX] Implement __nvvm_atom_add_gen_d builtin. by Justin Lebar · 8 years ago
  32. 595a448 Allow yaml2obj to order implicit sections for ELF by Dave Lee · 8 years ago
  33. c7c5ad7 [SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer binary ops. by Dinar Temirbulatov · 8 years ago
  34. 56fec39 Extend SpecialCaseList to allow users to blame matches on entries in the file. by Mitch Phillips · 8 years ago
  35. c062c8d [CodeGenPrepare] Fix typo in comment. NFC by Craig Topper · 8 years ago
  36. 5363e7a Use new vector insert half-word and byte instructions when we see insertelement on '8 x i16' and '16 x i8' types. Also extended existing lit testcase to cover these cases. by Graham Yiu · 8 years ago
  37. e9d757c [DWARFv5] Support DW_FORM_strp in the .debug_line header. by Paul Robinson · 8 years ago
  38. 7e1904e Recommit r317510 "[InstCombine] Pull shifts through a select plus binop with constant" by Craig Topper · 8 years ago
  39. 3c64d8f [InstCombine] Update stale comment. NFC by Craig Topper · 8 years ago
  40. 5933b24 [Hexagon] Make a test more flexible in HexagonLoopIdiomRecognition by Krzysztof Parzyszek · 8 years ago
  41. 9983524 [AArch64][SVE] Asm: Add support for (ADD|SUB)_ZZZ by Florian Hahn · 8 years ago
  42. 6cf02b9 [AArch64][SVE] Asm: Add SVE (Z) Register definitions and parsing support by Florian Hahn · 8 years ago
  43. 70b92b6 [SelectionDAG] Fix typo in comment. NFC by Craig Topper · 8 years ago
  44. 861d296 [AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models. by Florian Hahn · 8 years ago
  45. 8cec6c4 Reland "Correct dwarf unwind information in function epilogue for X86" by Petar Jovanovic · 8 years ago
  46. 25ff19d [SLP] Fix PR35047: Fix default cost model for cast op in X86. by Alexey Bataev · 8 years ago
  47. 81d5ecb Mark intentional fall-through with LLVM_FALLTHROUGH. by Kristof Beyls · 8 years ago
  48. c5e08cf [AArch64][SVE] Asm: Replace 'IsVector' by 'RegKind' in AArch64AsmParser (NFC) by Florian Hahn · 8 years ago
  49. 55f6a85 Silence C4715 warning from MSVC (NFC). by Kristof Beyls · 8 years ago
  50. b79469c [GlobalISel] Enable legalizing non-power-of-2 sized types. by Kristof Beyls · 8 years ago
  51. e82a7f1 [CGP] Disable Select instruction handling in optimizeMemoryInst. NFC by Serguei Katkov · 8 years ago
  52. c1c411e [X86] Don't clobber reserved registers with stack adjustments by Bjorn Steinbrink · 8 years ago
  53. c305f3d [X86] Add patterns to fold a 64-bit load into the EVEX vcvtph2ps instructions. by Craig Topper · 8 years ago
  54. 7f45818 [X86] Add patterns for folding a v16i8 with the VEX vcvtph2ps intrinsics. by Craig Topper · 8 years ago
  55. 0c6a9e1 [X86] Add support for using EVEX instructions for the legacy vcvtph2ps intrinsics. by Craig Topper · 8 years ago
  56. f14ad9a [X86] Use IMPLICIT_DEF in VEX/EVEX vcvtss2sd/vcvtsd2ss patterns instead of a COPY_TO_REGCLASS. by Craig Topper · 8 years ago
  57. 0b9dcde [X86] Remove 'Requires' from instructions with no patterns. NFC by Craig Topper · 8 years ago
  58. 59aa491 [Support/UNIX] posix_fallocate() can fail with EINVAL. by Davide Italiano · 8 years ago
  59. 0227fe5 Make DIExpression::createFragmentExpression() return an Optional. by Adrian Prantl · 8 years ago
  60. 964a48a [IPO/LowerTypesTest] Skip blockaddress(es) when replacing uses. by Davide Italiano · 8 years ago
  61. db6cc31 AMDGPU: Remove redundant combine by Matt Arsenault · 8 years ago
  62. 0ffa879 [DebugInfo] Unify logic to merge DILocations. NFC. by Vedant Kumar · 8 years ago
  63. b67df9f [Support][Chrono] Use explicit cast of text output of time values. by Simon Dardis · 8 years ago
  64. 790be31 InstCombine: salvage the debug info of DCE'ed add instructions. by Adrian Prantl · 8 years ago
  65. acf8758 [X86] Make FeatureAVX512 imply FeatureF16C. by Craig Topper · 8 years ago
  66. 490bc39 [X86] Make FeatureAVX512 imply FeatureFMA. by Craig Topper · 8 years ago
  67. 618cf29 [ValueTracking] readonly (const) is a requirement for converting sqrt to llvm.sqrt; nnan is not by Sanjay Patel · 8 years ago
  68. e209a1a Revert r317510 "[InstCombine] Pull shifts through a select plus binop with constant" by Hans Wennborg · 8 years ago
  69. cebfaaf Fix comment /NFC by Xinliang David Li · 8 years ago
  70. 4cbab70 [MIRPrinter] Use %subreg.xxx syntax for subregister index operands by Bjorn Pettersson · 8 years ago
  71. aceaaf0 [InstCombine] Pull shifts through a select plus binop with constant by Craig Topper · 8 years ago
  72. e005ea7 Fix buildbot breakages from r317503. Add parentheses to assignment when using result as a condition. by Graham Yiu · 8 years ago
  73. 20a90ab Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles, and use P9 shift and vector insert byte instructions instead of vperm. Extends tests from vector insert half-word. by Graham Yiu · 8 years ago
  74. 561a742 Include already promoted counts when computing SUM for VP. by Dehao Chen · 8 years ago
  75. 416cdcc [PPC] Use xxbrd to speed up bswap64 by Guozhi Wei · 8 years ago
  76. bd04b64 AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32 by Matt Arsenault · 8 years ago
  77. 00e900a [IR] redefine 'UnsafeAlgebra' / 'reassoc' fast-math-flags and add 'trans' fast-math-flag by Sanjay Patel · 8 years ago
  78. ae8a000 [X86][SSE] Merge combineExtractVectorElt_SSE into combineExtractVectorElt. NFCI. by Simon Pilgrim · 8 years ago
  79. 6e1c5e0 [X86][SSE] Combine EXTRACT_VECTOR_ELT with combineExtractWithShuffle before XFormVExtractWithShuffleIntoLoad by Simon Pilgrim · 8 years ago
  80. ec1f0cc [AMDGPU] Change alloca addr space of r600 to 5 for amdgiz environment by Yaxun Liu · 8 years ago
  81. 044ea89 [SystemZ] implement hasDivRemOp() by Jonas Paulsson · 8 years ago
  82. 13a223e [AMDGPU] Fix assertion due to assuming pointer in default addr space is 32 bit by Yaxun Liu · 8 years ago
  83. dfaa4d2 [mips] Add movep for microMIPS32R6 and fix microMIPS32r3 version by Simon Dardis · 8 years ago
  84. 84066df [LV][X86] update the cost of interleaving mem. access of floats by Mohammed Agabaria · 8 years ago
  85. 194c54b [mips] Fix PR35140 by Simon Dardis · 8 years ago
  86. d8ea264 [X86][AVX512] Improve lowering of AVX512 test intrinsics by Uriel Korach · 8 years ago
  87. 16b230f [X86] Replace duplicate function call with variable. NFC by Uriel Korach · 8 years ago
  88. 807235c X86 ISel: Basic support for variable-index vector permutations by Zvi Rackover · 8 years ago
  89. 150ca11 Revert "adding a pattern for broadcastm" by Jina Nahias · 8 years ago
  90. 8738ed4 [ObjectYAML] Map relocation types for COFF ARMNT and ARM64 by Martin Storsjo · 8 years ago
  91. 028edca [x86][AVX512] Lowering Broadcastm intrinsics to LLVM IR by Jina Nahias · 8 years ago
  92. 2513e7c adding a pattern for broadcastm by Jina Nahias · 8 years ago
  93. f9f3d36 [X86] Use EVEX encoded intrinsics for legacy FMA intrinsics when possible. by Craig Topper · 8 years ago
  94. af14030 [X86] Add scalar FMA ISD nodes without rounding mode. NFC by Craig Topper · 8 years ago
  95. 67a8012 [X86] Use EVEX encoded instructions for legacy scalar sqrt intrinsics. by Craig Topper · 8 years ago
  96. c8200b7 [PassManager, SimplifyCFG] Revert r316908 and r316869. by David L. Jones · 8 years ago
  97. d864a8d [X86] Add missing predicate to a pattern. NFC by Craig Topper · 8 years ago
  98. 3594a87 [X86] Remove some more RCP and RSQRT patterns from InstrAVX512.td that I missed in r317413. by Craig Topper · 8 years ago
  99. f99fcce [X86] Fix outdated comment. NFC by Craig Topper · 8 years ago
  100. ee5e318 by Dorit Nuzman · 8 years ago