... 44, NO. 5, MAY 2009 Design of a High Performance 2-GHz Direct-Conversion Front-End With a Sin... more ... 44, NO. 5, MAY 2009 Design of a High Performance 2-GHz Direct-Conversion Front-End With a Single-Ended RF Input in 0.13 m CMOS Yiping Feng, Student Member, IEEE, Gaku Takemura, Shunji Kawaguchi, and Peter Kinget, Senior Member, IEEE ...
This paper describes a 2.1-GHz CMOS front-end with a single-ended low noise amplifier (LNA) and a... more This paper describes a 2.1-GHz CMOS front-end with a single-ended low noise amplifier (LNA) and a double balanced, current-driven passive mixer. The LNA features an on-chip transformer load to perform single-ended to differential conversion. Implemented in a 0.13 um CMOS process, it achieves 30 dB conversion gain, a low noise figure of 3.1 dB, a 40 kHz 1/f noise corner, an in-band IIP3 of -12 dBm and IIP2 better than 39 dBm, while consuming only 12 mW from a 1.5 V power supply.
ABSTRACT A low-power, low-noise direct-conversion 1.8 GHz front-end for WCDMA-type applications f... more ABSTRACT A low-power, low-noise direct-conversion 1.8 GHz front-end for WCDMA-type applications features an efficient, robust, digitally assisted self-calibration loop that maintains the IIP2 of the receiver to better than 60 dBm. It has a conversion gain of 38.5 dB, a DSB NF of 2.6 dB, and an IIP3 of -17.6 dBm, consumes 15 mA from a 1.5 V supply, and occupies 1.56 mm2 in a 0.13 ¿m CMOS process.
... Ajay Balankutty, Student Member, IEEE, Shih-An Yu, Student Member, IEEE, Yiping Feng, Student... more ... Ajay Balankutty, Student Member, IEEE, Shih-An Yu, Student Member, IEEE, Yiping Feng, Student Member, IEEE, and Peter R. Kinget, Senior Member ... considerable signal energy near DC, a low-IF architecture is preferred for Bluetooth to avoid the degradation of SNR due to 1/f ...
We explore the challenges of designing RF transceivers for an ultra-low-voltage (ULV) supply with... more We explore the challenges of designing RF transceivers for an ultra-low-voltage (ULV) supply with performance that is compatible to commercial standards. The ITRS roadmap projects that the aggressive device size scaling will result in supply voltage reductions to well below IV, in particular for low-power technologies. The use of alternative energy sources also requires ULV operation in some applications. Achieving sufficient linearity with low power consumption is very challenging for the ULV mixer and baseband circuits. The on-chip LO generation and distribution is difficult due to the low-voltage device bias. We present optimized mixer and filter topologies, and a polyphase LO buffer, used in a low-power ULV receiver for 2.4GHz applications like Bluetooth or Zigbee. The use of spiral inductors is kept to a minimum to avoid their excessive area. The design techniques demonstrated here can enable the continued integration of RF front-ends onto SoC devices in nano CMOS technologies without requiring dedicated supply voltages or thick oxide devices.
... 44, NO. 5, MAY 2009 Design of a High Performance 2-GHz Direct-Conversion Front-End With a Sin... more ... 44, NO. 5, MAY 2009 Design of a High Performance 2-GHz Direct-Conversion Front-End With a Single-Ended RF Input in 0.13 m CMOS Yiping Feng, Student Member, IEEE, Gaku Takemura, Shunji Kawaguchi, and Peter Kinget, Senior Member, IEEE ...
This paper describes a 2.1-GHz CMOS front-end with a single-ended low noise amplifier (LNA) and a... more This paper describes a 2.1-GHz CMOS front-end with a single-ended low noise amplifier (LNA) and a double balanced, current-driven passive mixer. The LNA features an on-chip transformer load to perform single-ended to differential conversion. Implemented in a 0.13 um CMOS process, it achieves 30 dB conversion gain, a low noise figure of 3.1 dB, a 40 kHz 1/f noise corner, an in-band IIP3 of -12 dBm and IIP2 better than 39 dBm, while consuming only 12 mW from a 1.5 V power supply.
ABSTRACT A low-power, low-noise direct-conversion 1.8 GHz front-end for WCDMA-type applications f... more ABSTRACT A low-power, low-noise direct-conversion 1.8 GHz front-end for WCDMA-type applications features an efficient, robust, digitally assisted self-calibration loop that maintains the IIP2 of the receiver to better than 60 dBm. It has a conversion gain of 38.5 dB, a DSB NF of 2.6 dB, and an IIP3 of -17.6 dBm, consumes 15 mA from a 1.5 V supply, and occupies 1.56 mm2 in a 0.13 ¿m CMOS process.
... Ajay Balankutty, Student Member, IEEE, Shih-An Yu, Student Member, IEEE, Yiping Feng, Student... more ... Ajay Balankutty, Student Member, IEEE, Shih-An Yu, Student Member, IEEE, Yiping Feng, Student Member, IEEE, and Peter R. Kinget, Senior Member ... considerable signal energy near DC, a low-IF architecture is preferred for Bluetooth to avoid the degradation of SNR due to 1/f ...
We explore the challenges of designing RF transceivers for an ultra-low-voltage (ULV) supply with... more We explore the challenges of designing RF transceivers for an ultra-low-voltage (ULV) supply with performance that is compatible to commercial standards. The ITRS roadmap projects that the aggressive device size scaling will result in supply voltage reductions to well below IV, in particular for low-power technologies. The use of alternative energy sources also requires ULV operation in some applications. Achieving sufficient linearity with low power consumption is very challenging for the ULV mixer and baseband circuits. The on-chip LO generation and distribution is difficult due to the low-voltage device bias. We present optimized mixer and filter topologies, and a polyphase LO buffer, used in a low-power ULV receiver for 2.4GHz applications like Bluetooth or Zigbee. The use of spiral inductors is kept to a minimum to avoid their excessive area. The design techniques demonstrated here can enable the continued integration of RF front-ends onto SoC devices in nano CMOS technologies without requiring dedicated supply voltages or thick oxide devices.
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