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ORCIDIEEE Transactions on Circuits and Systems I: Regular Papers, Volume 64
Volume 64-I, Number 1, January 2017
- Andreas Demosthenous
:
Update From the Editor-in-Chief. 1-2 - Sandipan Kundu, Subhanshu Gupta, David J. Allstot, Jeyanandh Paramesh:
Frequency-Channelized Mismatch-Shaped Quadrature Data Converters for Carrier Aggregation in MU-MIMO LTE-A. 3-13 - Jason Remple, Ian Galton:
The Effects of Inter-Symbol Interference in Dynamic Element Matching DACs. 14-23 - Charis Basetas, Thanasis Orfanos, Paul P. Sotiriadis:
A Class of 1-Bit Multi-Step Look-Ahead Σ-Δ Modulators. 24-37 - Miron Klosowski, Waldemar Jendernalik, Jacek Jakusz, Grzegorz Blakiewicz, Stanislaw Szczepanski:
A CMOS Pixel With Embedded ADC, Digital CDS and Gain Correction Capability for Massively Parallel Imaging Array. 38-49 - Hang Yu, Wei Tang, Menghan Guo, Shoushun Chen:
A Two-Step Prediction ADC Architecture for Integrated Low Power Image Sensors. 50-60 - Hugo Serra, Rui Santos-Tavares, Nuno Paulino:
A Numerical Methodology for the Analysis of Switched-Capacitor Filters Taking Into Account Non-Ideal Effects of Switches and Amplifiers. 61-71 - Chayan Bhawal, Debasattam Pal, Sandeep Kumar, Madhu N. Belur:
New Results and Techniques for Computation of Stored Energy in Lossless/All-Pass Systems. 72-85 - Brian Koziel, Reza Azarderakhsh, Mehran Mozaffari Kermani, David Jao:
Post-Quantum Cryptography on FPGA Based on Isogenies on Elliptic Curves. 86-99 - Mehrnaz Ahmadi, Bijan Alizadeh, Behjat Forouzandeh:
A Hybrid Time Borrowing Technique to Improve the Performance of Digital Circuits in the Presence of Variations. 100-110 - Ahmad A. Hiasat:
A Reverse Converter and Sign Detectors for an Extended RNS Five-Moduli Set. 111-121 - Wang Kang, Tingting Pang, Weifeng Lv, Weisheng Zhao:
Dynamic Dual-Reference Sensing Scheme for Deep Submicrometer STT-MRAM. 122-132 - Yao Liu, Ray C. C. Cheung, Hei Wong:
A Bias-Bounded Digital True Random Number Generator Architecture. 133-144 - Minhao Yang, Shih-Chii Liu, Tobi Delbrück:
Analysis of Encoding Degradation in Spiking Sensors Due to Spike Delay Variation. 145-155 - Jingook Kim:
Statistical Analysis for Pattern-Dependent Simultaneous Switching Outputs (SSO) of Parallel Single-Ended Buffers. 156-169 - (Withdrawn) Reliable Output Feedback Control of Discrete-Time Fuzzy Affine Systems With Actuator Faults. 170-181
- Behrooz Nakhkoob, Mona Mostafa Hella:
A 4.7-Gb/s Reconfigurable CMOS Imaging Optical Receiver Utilizing Adaptive Spectrum Balancing Equalizer. 182-194 - Debashis Banerjee, Barry John Muldrey, Xian Wang, Shreyas Sen, Abhijit Chatterjee:
Self-Learning RF Receiver Systems: Process Aware Real-Time Adaptation to Channel Conditions for Low Power Operation. 195-207 - Mehran Mozaffari Kermani, Vineeta Singh, Reza Azarderakhsh:
Reliable Low-Latency Viterbi Algorithm Architectures Benchmarked on ASIC and FPGA. 208-216 - Abhik Das, Yuan Gao, Tony Tae-Hyoung Kim:
A 220-mV Power-on-Reset Based Self-Starter With 2-nW Quiescent Power for Thermoelectric Energy Harvesting Systems. 217-226 - Armine Karami, Dimitri Galayko, Philippe Basset:
Series-Parallel Charge Pump Conditioning Circuits for Electrostatic Kinetic Energy Harvesting. 227-240
Volume 64-I, Number 2, February 2017
- Soheil Golara, Shervin Moloudi, Asad A. Abidi:
Processes of AM-PM Distortion in Large-Signal Single-FET Amplifiers. 245-260 - Zheng Wang, Payam Heydari:
A Study of Operating Condition and Design Methods to Achieve the Upper Limit of Power Gain in Amplifiers at Near-fmax Frequencies. 261-271 - Ahmed A. Abdelmoaty, Mohammad Al-Shyoukh, Ying-Chih Hsu, Ayman A. Fayed:
A MPPT Circuit With 25 µW Power Consumption and 99.7% Tracking Efficiency for PV Systems. 272-282 - Romesh Kumar Nandwana, Saurabh Saxena, Amr Elshazly, Kartikeya Mayaram, Pavan Kumar Hanumolu:
A 1-to-2048 Fully-Integrated Cascaded Digital Frequency Synthesizer for Low Frequency Reference Clocks Using Scrambling TDC. 283-295 - Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran:
Partial Dynamic Element Matching Technique for Digital-to-Analog Converters Used for Digital Harmonic-Cancelling Sine-Wave Synthesis. 296-309 - Hesham Omran, Abdulaziz Alhoshany, Hamzah Alahmadi, Khaled N. Salama:
A 33fJ/Step SAR Capacitance-to-Digital Converter Using a Chain of Inverter-Based Amplifiers. 310-321 - Dong-Jin Chang, Wan Kim, Min-Jae Seo, Hyeok-Ki Hong, Seung-Tak Ryu:
Normalized-Full-Scale-Referencing Digital-Domain Linearity Calibration for SAR ADC. 322-332 - Sotoudeh Hamedi-Hagh:
Introducing Suspendance Analysis. 333-346 - Essam S. Atalla, Frank Zhang, Poras T. Balsara, Abdellatif Bellaouar, Seydou Ba, Kamran Kiasaleh:
Time-Domain Analysis of Passive Mixer Impedance: A Switched-Capacitor Approach. 347-359 - Khawar Sarfraz, Mansun Chan:
A 1.2V-to-0.4V 3.2GHz-to-14.3MHz Power-Efficient 3-Port Register File in 65-nm CMOS. 360-372 - Lauren Guckert, Earl E. Swartzlander Jr.:
Optimized Memristor-Based Multipliers. 373-385 - Manish Kumar Jaiswal, Hayden Kwok-Hay So:
Area-Efficient Architecture for Dual-Mode Double Precision Floating Point Division. 386-398 - Pramod Kumar Meher, Xin Lou:
Low-Latency, Low-Area, and Scalable Systolic-Like Modular Multipliers for GF(2m) Based on Irreducible All-One Polynomials. 399-408 - Elisardo Antelo, Paolo Montuschi, Alberto Nannarelli:
Improved 64-bit Radix-16 Booth Multiplier Based on Partial Product Array Height Reduction. 409-418 - Ju-Hong Lee, Jiun-Shian Du:
Lattice Structure Realization for The Design of 2-D Digital Allpass Filters With General Causality. 419-431 - Federico Pepe, Pietro Andreani:
A General Theory of Phase Noise in Transconductor-Based Harmonic Oscillators. 432-445 - Yu-Cheng Tsai, Chiao-En Chen, Chia-Hsiang Yang:
A Flexible Geometric Mean Decomposition Processor for MIMO Communication Systems. 446-456 - Huang-Chang Lee, Mao-Ruei Li, Jyun-Kai Hu, Po-Chiao Chou, Yeong-Luh Ueng:
Optimization Techniques for the Efficient Implementation of High-Rate Layered QC-LDPC Decoders. 457-470 - Ali Asghar Razavi Haeri, Mohammadreza Ghaderi Karkani, Mohammad Sharifkhani, Mahmoud Kamarei, Ali Fotowat-Ahmady:
Analysis and Design of Power Harvesting Circuits for Ultra-Low Power Applications. 471-479 - Lenon Schmitz, Denizar Cruz Martins, Roberto Francisco Coelho:
Generalized High Step-Up DC-DC Boost-Based Converter With Gain Cell. 480-493 - Giuseppina Monti, Wenquan Che, Qinghua Wang, Alessandra Costanzo, Marco Dionigi, Franco Mastri, Mauro Mongiardo, Renzo Perfetti, Luciano Tarricone, Yumei Chang:
Wireless Power Transfer With Three-Ports Networks: Optimal Analytical Solutions. 494-503
Volume 64-I, Number 3, March 2017
- Jia Zhou, Tong Ge, Joseph S. Chang:
Printed Electronics: Effects of Bending and a Self-Compensation Means. 505-515 - Brandon Rumberg, David W. Graham, Mir Mohammad Navidi:
A Regulated Charge Pump for Tunneling Floating-Gate Transistors. 516-527 - Zhicong Luo, Ming-Dou Ker, Wan-Hsueh Cheng, Ting-Yang Yen:
Regulated Charge Pump With New Clocking Scheme for Smoothing the Charging Current in Low Voltage CMOS Process. 528-536 - Liao Wu, Xuan-Dien Do, Sang-Gug Lee, Dong Sam Ha:
A Self-Powered and Optimal SSHI Circuit Integrated With an Active Rectifier for Piezoelectric Energy Harvesting. 537-549 - Sami Kurtti, Jan Nissinen, Juha Kostamovaara:
A Wide Dynamic Range CMOS Laser Radar Receiver With a Time-Domain Walk Error Compensation Scheme. 550-561 - Jin-Yi Lin, Chih-Cheng Hsieh:
A 0.3 V 10-bit SAR ADC With First 2-bit Guess in 90-nm CMOS. 562-572 - Paolo Stefano Crovetti:
All-Digital High Resolution D/A Conversion by Dyadic Digital Pulse Modulation. 573-584 - Mohammad Saeed Sarafraz, Mohammad Saleh Tavazoei:
Passive Realization of Fractional-Order Impedances by a Fractional Element and RLC Components: Conditions and Procedure. 585-595 - Fang Su, Yongpan Liu, Yiqun Wang, Huazhong Yang:
A Ferroelectric Nonvolatile Processor with 46 $\mu $ s System-Level Wake-up Time and 14 $\mu $ s Sleep Time for Energy Harvesting Applications. 596-607 - Chun-Yi Liu, Meng-Siou Sie, Edmund Wen Jen Leong, Yu-Cheng Yao, Chih-Wei Jen, Wei-Chang Liu, Chih-Feng Wu, Shyh-Jye Jou:
Dual-Mode All-Digital Baseband Receiver With a Feed-Forward and Shared-Memory Architecture for Dual-Standard Over 60 GHz NLOS Channel. 608-618 - Wenbing Zhang, Yang Tang, Yurong Liu, Jürgen Kurths:
Event-Triggering Containment Control for a Class of Multi-Agent Networks With Fixed and Switching Topologies. 619-629 - Lei Yang, Bin Wu, Xiaobin Zhang, Keyue Ma Smedley, Guann-Pyng Li:
Dynamic Modeling and Analysis of Constant On Time Variable Frequency One-Cycle Control for Switched-Capacitor Converters. 630-641 - Liang Wu, Hiu Fai Leung, Alvin Li, Howard C. Luong:
A 4-Element 60-GHz CMOS Phased-Array Receiver With Beamforming Calibration. 642-652 - Yipeng Wang, Duona Luo, Quan Pan, Liwen Jing, Zhixin Li, C. Patrick Yue:
A 60-GHz 4-Gb/s Fully Integrated NRZ-to-QPSK Fiber-Wireless Modulator. 653-663 - Hyosup Won, Joon-Yeong Lee, Taehun Yoon, Kwangseok Han, Sangeun Lee, Jinho Park, Hyeon-Min Bae:
A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor. 664-674 - Marcelo de Souza, André Augusto Mariano, Thierry Taris:
Reconfigurable Inductorless Wideband CMOS LNA for Wireless Communications. 675-685 - Anthony Goavec, Mykhailo Zarudniev, Remy Vauche, Frédéric Hameau, Jean Gaubert, Eric Mercier:
An Efficient Method of Power Spectral Density Estimation for On-Chip IR-UWB Transmitter Self-Calibration. 686-695 - Daniel Markert, Xin Yu, Holger Heimpel, Georg Fischer:
An All-Digital, Single-Bit RF Transmitter for Massive MIMO. 696-704 - Mohammad Alhawari, Baker Mohammad, Hani H. Saleh, Mohammed Ismail:
An Efficient Polarity Detection Technique for Thermoelectric Harvester in L-based Converters. 705-716 - Lin Cheng, Wing-Hung Ki, Fan Yang, Philip K. T. Mok, Xiaocheng Jing:
Predicting Subharmonic Oscillation of Voltage-Mode Switching Converters Using a Circuit-Oriented Geometrical Approach. 717-730 - Xiu Yin Zhang, Zhi-Xia Du, Quan Xue:
High-Efficiency Broadband Rectifier With Wide Ranges of Input Power and Output Load Based on Branch-Line Coupler. 731-739 - Xiao Liu, Aaron M. Cramer, Fei Pan:
Generalized Average Method for Time-Invariant Modeling of Inverters. 740-751
Volume 64-I, Number 4, April 2017
- Federico Butti, Massimo Piotto, Paolo Bruschi:
A Chopper Instrumentation Amplifier With Input Resistance Boosting by Means of Synchronous Dynamic Element Matching. 753-764 - Jonghoon Park, Changhyun Lee, Changkun Park:
A Quad-Band CMOS Linear Power Amplifier for EDGE Applications Using an Anti-Phase Method to Enhance its Linearity. 765-776 - Bradford L. Hunter, Wallace E. Matthews:
A ± 3 ppm/°C Single-Trim Switched Capacitor Bandgap Reference for Battery Monitoring Applications. 777-786 - Peter Luong, Carlos Christoffersen, Conrado Rossi-Aicardi, Carlos Dualibe:
Nanopower, Sub-1 V, CMOS Voltage References With Digitally-Trimmable Temperature Coefficients. 787-798 - Kuan Chuang Koay, Pak Kwong Chan:
A Low Energy-Noise 65nm CMOS Switched-Capacitor Resistive-Bridge Sensor Interface. 799-810 - Yen-Hsiang Tseng, Che-Wei Yeh, Shen-Iuan Liu:
A 2.25-2.7 GHz Area-Efficient Subharmonically Injection-Locked Fractional-N Frequency Synthesizer With a Fast-Converging Correlation Loop. 811-822 - Yong-Hun Kim, Taeho Lee, Hyun-Kyu Jeon, Dongil Lee, Lee-Sup Kim:
An Input Data and Power Noise Inducing Clock Jitter Tolerant Reference-Less Digital CDR for LCD Intra-Panel Interface. 823-835 - Mina Shahmohammadi, Masoud Babaie, Robert Bogdan Staszewski:
Tuning Range Extension of a Transformer-Based Oscillator Through Common-Mode Colpitts Resonance. 836-846 - Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao:
Robust Ultra-Low Power Non-Volatile Logic-in-Memory Circuits in FD-SOI Technology. 847-857 - Keng-Hao Yang, Hsiang-Jen Tsai, Chia-Yin Li, Paul Jendra, Meng-Fan Chang, Tien-Fu Chen:
eTag: Tag-Comparison in Memory to Achieve Direct Data Access based on eDRAM to Improve Energy Efficiency of DRAM Cache. 858-868 - Luiz Alberto Pasini Melek, Anselmo Luis da Silva, Márcio Cherem Schneider, Carlos Galup-Montoro:
Analysis and Design of the Classical CMOS Schmitt Trigger in Subthreshold Operation. 869-878 - Vladimir Trujillo-Olaya, Jaime Velasco-Medina:
Half-Matrix Normal Basis Multiplier Over GF(pm). 879-891 - Baozhou Zhu, Yuanwu Lei, Yuanxi Peng, Tingting He:
Low Latency and Low Error Floating-Point Sine/Cosine Function Based TCORDIC Algorithm. 892-905 - Khoa Le, Fakhreddine Ghaffari, David Declercq, Bane Vasic:
Efficient Hardware Implementation of Probabilistic Gradient Descent Bit-Flipping. 906-917 - Shuichi Ohno, M. Rizwan Tariq:
Optimization of Noise Shaping Filter for Quantizer With Error Feedback. 918-930 - Giovanni De Luca, Pascal Bolcato, Remi Larcheveque, Joost Rommes, Wil H. A. Schilders:
Fast and Accurate Time-Domain Simulations of Integer-N PLLs. 931-944 - Yanling Wei, Jianbin Qiu, Peng Shi, Mohammed Chadli:
Fixed-Order Piecewise-Affine Output Feedback Controller for Fuzzy-Affine-Model-Based Nonlinear Systems With Time-Varying Delay. 945-958 - Wun-Jian Su, Shen-Iuan Liu:
A 5 Gb/s Voltage-Mode Transmitter Using Adaptive Time-Based De-Emphasis. 959-968 - Xican Chen, Yiyu Shen, Zhicheng Wang, Woogeun Rhee, Zhihua Wang:
A 17 mW 3-to-5 GHz Duty-Cycled Vital Sign Detection Radar Transceiver With Frequency Hopping and Time-Domain Oversampling. 969-980 - Gilbert Matig-a, Mehmet R. Yuce, Jean-Michel Redoute:
Design of a CML Transceiver With Self-Immunity to EMI in 0.18-µm CMOS. 981-991 - Amin Khalili Moghaddam, Joon Huang Chuah, Harikrishnan Ramiah, Jalil Ahmadian, Pui-In Mak, Rui Paulo Martins:
A 73.9%-Efficiency CMOS Rectifier Using a Lower DC Feeding (LDCF) Self-Body-Biasing Technique for Far-Field RF Energy-Harvesting Systems. 992-1002 - Shang-Hsien Yang, Tsung-Hsun Tsai, Hsin Chen, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai:
High Accuracy Knee Voltage Detection for Primary-Side Control in Flyback Battery Charger. 1003-1012
Volume 64-I, Number 5, May 2017
- Pedro M. Julian, Lisandro Lovisolo:
Guest Editorial Special Section on the 2016 IEEE Latin American Symposium on Circuits and Systems (LASCAS 2016). 1017-1018 - Benjamín T. Reyes, Raul M. Sanchez, Ariel L. Pola, Mario R. Hueda:
Design and Experimental Evaluation of a Time-Interleaved ADC Calibration Algorithm for Application in High-Speed Communication Systems. 1019-1030 - Piotr Patronik, Stanislaw J. Piestrak:
Hardware/Software Approach to Designing Low-Power RNS-Enhanced Arithmetic Units. 1031-1039 - Ettore Napoli, Gerardo Castellano, Davide De Caro, Darjn Esposito, Nicola Petra, Antonio Giuseppe Maria Strollo:
Single Bit Filtering Circuit Implemented in a System for the Generation of Colored Noise. 1040-1050 - Gordana Jovanovic-Dolecek, Ricardo Garcia Baez, Massimiliano Laddomada:
Design of Efficient Multiplierless Modified Cosine-Based Comb Decimation Filters: Analysis and Implementation. 1051-1063 - Felipe Tuyama De Faria Barbosa, Duarte Lopes de Oliveira, Tiago S. Curtinhas, Lester de Abreu Faria, Jocemar Francisco De Souza Luciano:
Implementation of Locally-Clocked XBM State Machines on FPGAs Using Synchronous CAD Tools. 1064-1074 - Ugur Sonmez, Fabio Sebastiano, Kofi A. A. Makinwa:
Analysis and Design of VCO-Based Phase-Domain ΣΔ Modulators. 1075-1084 - Chan-Hsiang Weng, Yung-Yu Lin, Tsung-Hsien Lin:
A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator With a Feedback-Assisted Quantizer. 1085-1093 - Yao-Hong Liu, Johan H. C. van den Heuvel, Takashi Kuramochi, Benjamin Busze, Paul Mateman, Vamshi Krishna Chillara, Bindi Wang, Robert Bogdan Staszewski, Kathleen Philips:
An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS. 1094-1105 - Chih-Min Chang, Jieh-Tsorng Wu:
A 95-dBA DR Digital Audio Class-D Amplifier Using a Calibrated Digital-to-Pulse Converter. 1106-1117 - Pydi Ganga Bahubalindruni, Vítor Grade Tavares, Rodrigo Martins, Elvira Fortunato, Pedro Barquinha:
A Low-Power Analog Adder and Driver Using a-IGZO TFTs. 1118-1125 - Mustafa Ozen, Mark P. van der Heijden, Mustafa Acar, Rik Jos, Christian Fager:
A Generalized Combiner Synthesis Technique for Class-E Outphasing Transmitters. 1126-1139 - Manh Duy Luong, Ryo Ishikawa, Yoichiro Takayama, Kazuhiko Honjo:
Microwave Characteristics of an Independently Biased 3-Stack InGaP/GaAs HBT Configuration. 1140-1151 - Ettore Lorenzo Firrao, Anne-Johan Annema, Frank E. van Vliet, Bram Nauta:
Hardware Implementation Overhead of Switchable Matching Networks. 1152-1163 - Esmaeel Maghsoudloo, Masoud Rezaei, Mohamad Sawan, Benoit Gosselin:
A High-Speed and Ultra Low-Power Subthreshold Signal Level Shifter. 1164-1172 - Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon:
Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure. 1173-1186 - Davide De Caro, Ettore Napoli, Darjn Esposito, Gerardo Castellano, Nicola Petra, Antonio G. M. Strollo:
Minimizing Coefficients Wordlength for Piecewise-Polynomial Hardware Function Evaluation With Exact or Faithful Rounding. 1187-1200 - Mauro Mangia, Fabio Pareschi, Valerio Cambareri, Riccardo Rovatti, Gianluca Setti:
Rakeness-Based Design of Low-Complexity Compressed Sensing. 1201-1213 - Chien-Cheng Tseng, Su-Ling Lee:
Fractional Hilbert Transform Sampling Method and Its Filter Bank Reconstruction. 1214-1224 - Antonio Buonomo, Alessandro Lo Schiavo:
A Study of Injection Locking in Dual-Band CMOS Frequency Dividers. 1225-1234 - Rongrong Qian, Zhisheng Duan, Yuan Qi:
Stability of Power Control in Multiple Coexisting Wireless Networks: ℒ2 Small-Gain Perspective. 1235-1246 - Hong Zhang, Shrirang Abhyankar, Emil M. Constantinescu, Mihai Anitescu:
Discrete Adjoint Sensitivity Analysis of Hybrid Dynamical Systems With Switching. 1247-1259 - Alexis Lopez-Riera, Francisco del Águìla López, Pere Palà-Schönwälder, Jordi Bonet-Dalmau, M. Rosa Giralt-Mas, F. Xavier Moncunill-Geniz:
Joint Symbol and Chip Synchronization for a Burst-Mode-Communication Superregenerative MSK Receiver. 1260-1269 - Krishna T. Settaluri, Christopher Lalau-Keraly, Eli Yablonovitch, Vladimir Stojanovic:
First Principles Optimization of Opto-Electronic Communication Links. 1270-1283
Volume 64-I, Number 6, June 2017
- Yo-Sheng Lin, Van Kien Nguyen:
94-GHz CMOS Power Amplifiers Using Miniature Dual Y-Shaped Combiner With RL Load. 1285-1298 - Zhiqiang Huang, Howard Cam Luong:
Design and Analysis of Millimeter-Wave Digitally Controlled Oscillators With C-2C Exponentially Scaling Switched-Capacitor Ladder. 1299-1307 - Hou-Ming Chen, Chang-Chi Lee, Shih-Han Jheng, Wei-Chih Chen, Bo-Yi Lee:
A Sub-1 ppm/°C Precision Bandgap Reference With Adjusted-Temperature-Curvature Compensation. 1308-1317 - Sheng-Yu Peng, Li-Han Liu, Pei-Ke Chang, Tzu-Yun Wang, Hao-Yu Li:
A Power-Efficient Reconfigurable Output-Capacitor-Less Low-Drop-Out Regulator for Low-Power Analog Sensing Front-End. 1318-1327 - Meng Zhao, Zhongjian Chen, Wengao Lu, Yacong Zhang, Yuze Niu, Guangyi Chen:
A High-Voltage Closed-Loop SC Interface for a ± 50 g Capacitive Micro-Accelerometer With 112.4 dB Dynamic Range. 1328-1341 - Stefan Trampitsch, Jovan Markovic, Patrick Obmann, Jonas Fritzin, Jan Zaleski, Christian Mayer, Michael Fulde, Harald Pretl, Andreas Springer, Mario Huemer:
A Nonlinear Switched State-Space Model for Capacitive RF DACs. 1342-1353 - Mohsen Hassanpourghadi, Praveen Kumar Sharma, Mike Shuo-Wei Chen:
A 6-b, 800-MS/s, 3.62-mW Nyquist Rate AC-Coupled VCO-Based ADC in 65-nm CMOS. 1354-1367 - Je-Kwang Cho:
A 2.24-mW, 61.8-dB SNDR, 20-MS/s Pipelined ADC With Charge-Pump-Based Dynamic Biasing for Power Reduction in Op Amp Sharing. 1368-1379 - Deyan Levski, Martin Wäny, Bhaskar Choubey:
Ramp Noise Projection in CMOS Image Sensor Single-Slope ADCs. 1380-1389 - Hongjia Mo, Michael Peter Kennedy:
Masked Dithering of MASH Digital Delta-Sigma Modulators With Constant Inputs Using Multiple Linear Feedback Shift Registers. 1390-1399 - Kwuang-Han Chang, Chih-Cheng Hsieh:
A Hybrid Analog-to-Digital Conversion Algorithm With Sub-Radix and Multiple Quantization Thresholds. 1400-1408 - Arnfinn Aas Eielsen, Andrew J. Fleming:
Improving Digital-to-Analog Converter Linearity by Large High-Frequency Dithering. 1409-1420 - Stefano Caviglia, Luigi Pinna, Maurizio Valle, Chiara Bartolozzi:
Spike-Based Readout of POSFET Tactile Sensors. 1421-1431 - Sai Manoj P. D., Jie Lin, Shikai Zhu, Yingying Yin, Xu Liu, Xiwei Huang, Chongshen Song, Wenqi Zhang, Mei Yan, Zhiyi Yu, Hao Yu:
A Scalable Network-on-Chip Microprocessor With 2.5D Integrated Memory and Accelerator. 1432-1443 - Junyoung Ko, Younghwi Yang, Jisu Kim, Younghoon Oh, Hyun Kook Park, Seong-Ook Jung:
Incremental Bitline Voltage Sensing Scheme With Half-Adaptive Threshold Reference Scheme in MLC PRAM. 1444-1455 - Xin-Yu Shih, Yue-Qu Liu, Hong-Ru Chou:
48-Mode Reconfigurable Design of SDF FFT Hardware Architecture Using Radix-32 and Radix-23 Design Approaches. 1456-1467 - Amey M. Kulkarni, Tinoosh Mohsenin:
Low Overhead Architectures for OMP Compressive Sensing Reconstruction Algorithm. 1468-1480 - Sachin Kumar, Chip-Hong Chang, Thian Fatt Tay:
New Algorithm for Signed Integer Comparison in {2n+k, 2n-1, 2n+1, 2n±1-1} and Its Efficient Hardware Implementation. 1481-1493 - Federico Bizzarri, Angelo Brambilla, Sergio Callegari:
Efficient and Reliable Small-Signal Estimate of Quantization Noise Contribution to Phase Noise in ΔΣ Fractional-N PLL. 1494-1503 - Hamidreza Mafi, Mostafa Yargholi, Mohammad Yavari:
Digital Blind Background Calibration of Imperfections in Time-Interleaved ADCs. 1504-1514 - Han Le Duc, Duc Minh Nguyen, Chadi Jabbour, Patricia Desgreys, Olivier Jamin, Van Tam Nguyen:
Fully Digital Feedforward Background Calibration of Clock Skews for Sub-Sampling TIADCs Using the Polyphase Decomposition. 1515-1528 - Rajib Lochan Das, Manish Narwaria:
Lorentzian Based Adaptive Filters for Impulsive Noise Environments. 1529-1539 - Fernando Corinto, Mauro Forti:
Memristor Circuits: Bifurcations without Parameters. 1540-1551 - Vasileios G. Ntinas, Ioannis Vourkas, Georgios Ch. Sirakoulis, Andrew Adamatzky:
Oscillation-Based Slime Mould Electronic Circuit Model for Maze-Solving Computations. 1552-1563 - Giuseppe Fontana, Antonio Luchetta, Stefano Manetti, Maria Cristina Piccirilli:
A Fast Algorithm for Testability Analysis of Large Linear Time-Invariant Networks. 1564-1575 - Jorge Fernandez Villena, Luís Miguel Silveira:
Circuit Synthesis for Guaranteed Positive Sparse Realization of Passive State-Space Models. 1576-1587 - Jiajia Chen, Jinghong Tan, Chip-Hong Chang, Feng Feng:
A New Cost-Aware Sensitivity-Driven Algorithm for the Design of FIR Filters. 1588-1598 - Michael Z. Q. Chen, Kai Wang, Chanying Li, Guanrong Chen:
Realization of Biquadratic Impedances as Five-Element Bridge Networks. 1599-1611 - Rémy Vauché, Eloi Muhr, Olivier Fourquin, Sylvain Bourdel, Jean Gaubert, Nicolas Dehaese, Stéphane Meillére, Hervé Barthélemy, Laurent Ouvry:
A 100 MHz PRF IR-UWB CMOS Transceiver With Pulse Shaping Capabilities and Peak Voltage Detector. 1612-1625 - Liang Wu, Hiu Fai Leung, Howard C. Luong:
Design and Analysis of CMOS LNAs with Transformer Feedback for Wideband Input Matching and Noise Cancellation. 1626-1635
Volume 64-I, Number 7, July 2017
- Hao Xu, Asad A. Abidi:
Design Methodology for Phase-Locked Loops Using Binary (Bang-Bang) Phase Detectors. 1637-1650 - Feiran Lei, Marvin H. White:
Reference Injected Phase-Locked Loops (PLL-RIs). 1651-1660 - Kuang-Wei Cheng, Shih-En Chen:
An Ultralow-Power Wake-Up Receiver Based on Direct Active RF Detection. 1661-1672 - Jie Fang, Shankar Thirunakkarasu, Xuefeng Yu, Fabian Silva-Rivas, Chaoming Zhang, Frank Singor, Jacob A. Abraham:
A 5-GS/s 10-b 76-mW Time-Interleaved SAR ADC in 28 nm CMOS. 1673-1683 - Jianyu Zhong, Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A 12b 180MS/s 0.068mm2 With Full-Calibration-Integrated Pipelined-SAR ADC. 1684-1695 - Leila Rajabi, Mehdi Saberi, Yao Liu, Reza Lotfi, Wouter A. Serdijn:
A Charge-Redistribution Phase-Domain ADC Using an IQ-Assisted Binary-Search Algorithm. 1696-1705 - Seungnam Choi, Yunjae Suh, Joohyun Lee, Jinkyu Kim, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Self-Biased Current-Mode Amplifier With an Application to 10-bit Pipeline ADC. 1706-1717 - Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Black-Box Calibration for ADCs With Hard Nonlinear Errors Using a Novel INL-Based Additive Code: A Pipeline ADC Case Study. 1718-1729 - Vishnu Unnikrishnan, Mark Vesterbacka:
Mitigation of Sampling Errors in VCO-Based ADCs. 1730-1739 - Alfio Dario Grasso, Salvatore Pennisi, Giuseppe Scotti, Alessandro Trifiletti:
0.9-V Class-AB Miller OTA in 0.35-µm CMOS With Threshold-Lowered Non-Tailed Differential Pair. 1740-1747 - Dries Peumans, Gerd Vandersteen:
An Improved Describing Function With Applications for OTA-Based Circuits. 1748-1757 - Xinyu Zhou, Shao Yong Zheng, Wing Shing Chan, Shichang Chen, Derek Ho:
Broadband Efficiency-Enhanced Mutually Coupled Harmonic Postmatching Doherty Power Amplifier. 1758-1771 - Sahil Shah, Jennifer Hasler:
Tuning of Multiple Parameters With a BIST System. 1772-1780 - Shu-Lin Wu, Mohammad Al-Khaleel:
Parameter Optimization in Waveform Relaxation for Fractional-Order RC Circuits. 1781-1790 - Shang-Lin Wu, Kuang-Yu Li, Po-Tsang Huang, Wei Hwang, Ming-Hsien Tu, Sheng-Chi Lung, Wei-Sheng Peng, Huan-Shun Huang, Kuen-Di Lee, Yung-Shin Kao, Ching-Te Chuang:
A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist. 1791-1802 - Wael M. Elsharkasy, Amin Khajeh, Ahmed M. Eltawil, Fadi J. Kurdahi:
Reliability Enhancement of Low-Power Sequential Circuits Using Reconfigurable Pulsed Latches. 1803-1814 - Jiafeng Xie, Pramod Kumar Meher, Mingui Sun, Yuecheng Li, Bo Zeng, Zhi-Hong Mao:
Efficient FPGA Implementation of Low-Complexity Systolic Karatsuba Multiplier Over GF(2m) Based on NIST Polynomials. 1815-1825 - Alberto Bernardini, Augusto Sarti:
Biparametric Wave Digital Filters. 1826-1838 - Bo-You Yu, Peng-Hua Wang, Po-Ning Chen:
A General Structure of Linear-Phase FIR Filters With Derivative Constraints. 1839-1852 - Umer I. Cheema, Gregory Nash, Rashid Ansari, Ashfaq Khokhar:
Memory-Optimized Re-Gridding Architecture for Non-Uniform Fast Fourier Transform. 1853-1864 - Michiel Verplaetse, Timothy De Keulenaer, Arno Vyncke, Ramses Pierco, Renato Vaernewyck, Joris Van Kerrebrouck, Johan Bauwelinck, Guy Torfs:
Adaptive Transmit-Side Equalization for Serial Electrical Interconnects at 100 Gb/s Using Duobinary. 1865-1876 - Tarik Menkad, Anestis Dounavis:
Resistive Coupling-Based Waveform Relaxation Algorithm for Analysis of Interconnect Circuits. 1877-1890 - Kexin Liu, Henghui Zhu, Jinhu Lu:
Cooperative Stabilization of a Class of LTI Plants With Distributed Observers. 1891-1902 - Fabrizio Loi, Enrico Mammei, Simone Erba, Matteo Bassi, Andrea Mazzanti:
A 25mW Highly Linear Continuous-Time FIR Equalizer for 25Gb/s Serial Links in 28-nm CMOS. 1903-1913 - Rakesh Gangarajaiah, Ove Edfors, Liang Liu:
An Adaptive QR Decomposition Processor for Carrier-Aggregated LTE-A in 28-nm FD-SOI. 1914-1926 - Andrew Hennessy, Amirhossein Alimohammad:
Design and Implementation of a Digital Secure Code-Shifted Reference UWB Transmitter and Receiver. 1927-1936 - Injun Choi, Ji-Hoon Kim:
High-Throughput Non-Binary LDPC Decoder Based on Aggressive Overlap Scheduling. 1937-1948
Volume 64-I, Number 8, August 2017
- Shanthi Pavan:
Analysis of Chopped Integrators, and Its Application to Continuous-Time Delta-Sigma Modulator Design. 1953-1965 - Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Franco Maloberti:
A 7.8-mW 5-b 5-GS/s Dual-Edges-Triggered Time-Based Flash ADC. 1966-1976 - Aritra Banerjee, Rahmi Hezar, Lei Ding, Baher Haroun:
A 29.5 dBm Class-E Outphasing RF Power Amplifier With Efficiency and Output Power Enhancement Circuits in 45nm CMOS. 1977-1988 - Amirreza Alizadeh, Majid Yaghoobi, Ali Medi:
Class-J2 Power Amplifiers. 1989-2002 - Iskender Haydaroglu, Mehmet Tamer Ozgun, Senol Mutlu:
Optically Powered Optical Transmitter Using a Single Light-Emitting Diode. 2003-2012 - Ehsan Jokar, Hamid Soleimani, Emmanuel M. Drakakis:
Systematic Computation of Nonlinear Bilateral Dynamical Systems With a Novel Low-Power Log-Domain Circuit. 2013-2025 - Ryo Matsuzuka, Tetsuya Hirose, Yuzuru Shizuku, Kyohei Shinonaga, Nobutaka Kuroki, Masahiro Numa:
An 80-mV-to-1.8-V Conversion-Range Low-Energy Level Shifter for Extremely Low-Voltage VLSIs. 2026-2035 - Kyungho Shin, Woong Choi, Jongsun Park:
Half-Select Free and Bit-Line Sharing 9T SRAM for Reliable Supply Voltage Scaling. 2036-2048 - Jie Zhang, Dan Li, Shiquan Fan, Zhuoqi Guo, Weibo Hu, Li Geng:
Theoretical Model of EnDP to Achieve Energy-Efficient SRAM. 2049-2062 - Tae Hoon Choi, Hanwool Jeong, Younghwi Yang, Juhyun Park, Seong-Ook Jung:
SRAM Operational Mismatch Corner Model for Efficient Circuit Design and Yield Analysis. 2063-2072 - Massimo Alioto, Giuseppe Scotti, Alessandro Trifiletti:
A Novel Framework to Estimate the Path Delay Variability On the Back of an Envelope via the Fan-Out-of-4 Metric. 2073-2085 - Jingwei Hu, Ray C. C. Cheung:
Toward Practical Code-Based Signature: Implementing Fast and Compact QC-LDGM Signature Scheme on Embedded Hardware. 2086-2097 - Zongsheng Zheng, Zhigang Liu, Haiquan Zhao, Yi Yu, Lu Lu:
Robust Set-Membership Normalized Subband Adaptive Filtering Algorithms and Their Application to Acoustic Echo Cancellation. 2098-2111 - Raphael Vansebrouck, Chadi Jabbour, Olivier Jamin, Patricia Desgreys:
Fully-Digital Blind Compensation of Non-Linear Distortions in Wideband Receivers. 2112-2123 - Lucia Valentina Gambuzza, Mattia Frasca, Luigi Fortuna, Vasileios G. Ntinas, Ioannis Vourkas, Georgios Ch. Sirakoulis:
Memristor Crossbar for Adaptive Synchronization. 2124-2133 - You Li, Zhiqiang Liu, Degang Chen:
Efficient Verification Against Undesired Operating Points for MOS Analog Circuits. 2134-2145 - B. Srinivasu, K. Sridharan:
A Synthesis Methodology for Ternary Logic Circuits in Emerging Device Technologies. 2146-2159 - Eyal Sarfati, Binyamin Frankel, Yitzhak Birk, Shmuel Wimer:
Optimal VLSI Delay Tuning by Space Tapering With Clock-Tree Application. 2160-2170 - Ting Zhang, Junmin Li:
Iterative Learning Control for Multi-Agent Systems With Finite-Leveled Sigma-Delta Quantization and Random Packet Losses. 2171-2181 - Hua Yang, Wallace K. S. Tang, Guanrong Chen, Guo-Ping Jiang:
Multi-Carrier Chaos Shift Keying: System Design and Performance Analysis. 2182-2194 - Vo-Trung-Dung Huynh, Nele Noels, Heidi Steendam:
Effect of Offset Mismatch in Time-Interleaved ADC Circuits on OFDM-BER Performance. 2195-2206 - Guipeng Chen, Yan Deng, Kun Wang, Yihua Hu, Lin Jiang, Huiqing Wen, Xiangning He:
Topology Derivation and Analysis of Integrated Multiple Output Isolated DC-DC Converters With Stacked Configuration for Low-Cost Applications. 2207-2218
Volume 64-I, Number 9, September 2017
- Massimo Alioto, Edgar Sánchez-Sinencio, Alberto L. Sangiovanni-Vincentelli:
Guest Editorial Special Issue on Circuits and Systems for the Internet of Things - From Sensing to Sensemaking. 2221-2225 - Giovanni De Micheli:
Cyber-Medical Systems: Requirements, Components and Design Examples. 2226-2236 - Taekwang Jang, Gyouho Kim, Benjamin P. Kempke, Michael B. Henry, Nikolaos Chiotellis, Carl Pfeiffer, Dongkwun Kim, Yejoong Kim, Zhiyoong Foo, Hyeongseok Kim, Anthony Grbic, Dennis Sylvester, Hun-Seok Kim, David D. Wentzloff, David T. Blaauw:
Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part I - Analog Circuit Techniques. 2237-2249 - Tae-Kwang Jang, Gyouho Kim, Benjamin P. Kempke, Michael B. Henry, Nikolaos Chiotellis, Carl Pfeiffer, Dongkwun Kim, Yejoong Kim, Zhiyoong Foo, Hyeongseok Kim, Anthony Grbic, Dennis Sylvester, Hun-Seok Kim, David D. Wentzloff, David T. Blaauw:
Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II - Data Communication, Energy Harvesting, Power Management, and Digital Circuits. 2250-2262 - Haitong Li, Tony F. Wu, Subhasish Mitra, H.-S. Philip Wong:
Resistive RAM-Centric Computing: Design and Modeling Methodology. 2263-2273 - Xiaoyang Wang, Po-Han Peter Wang, Yuan Cao, Patrick P. Mercier:
A 0.6V 75nW All-CMOS Temperature Sensor With 1.67m°C/mV Supply Sensitivity. 2274-2283 - Aili Wang, Chixiao Chen, Chuanjin Richard Shi:
Design and Analysis of an Always-ON Input-Biased pA-Current Sub-nW mV-Threshold Hysteretic Comparator for Near-Zero Energy Sensing. 2284-2294 - Jong Hwan Ko, Mohammad Faisal Amir, Khondker Zakir Ahmed, Taesik Na, Saibal Mukhopadhyay:
A Single-Chip Image Sensor Node With Energy Harvesting From a CMOS Pixel Array. 2295-2307 - Fernanda D. V. R. Oliveira, José Gabriel Rodríguez Carneiro Gomes, Jorge Fernández-Berni, Ricardo Carmona-Galán, Rocío del Río, Ángel Rodríguez-Vázquez:
Gaussian Pyramid: Comparative Analysis of Hardware Architectures. 2308-2321 - David E. Bellasi, Luca Benini:
Smart Energy-Efficient Clock Synthesizer for Duty-Cycled Sensor SoCs in 65 nm/28nm CMOS. 2322-2333 - Karim Rawy, Felix Kalathiparambil, Dominic Maurath, Tony Tae-Hyoung Kim:
A Self-Adaptive Time-Based MPPT With 96.2% Tracking Efficiency and a Wide Tracking Range of 10 µA to 1 mA for IoT Applications. 2334-2345 - Qiping Wan, Ying-Khai Teh, Yuan Gao, Philip K. T. Mok:
Analysis and Design of a Thermoelectric Energy Harvesting System With Reconfigurable Array of Thermoelectric Generators for IoT Applications. 2346-2358 - Saroj Mondal, Roy Paily:
Efficient Solar Power Management System for Self-Powered IoT Node. 2359-2369 - Anand Savanth, Alex S. Weddell, James Myers, David Flynn, Bashir M. Al-Hashimi:
Integrated Reciprocal Conversion With Selective Direct Operation for Energy Harvesting Systems. 2370-2379 - Kaveh Gharehbaghi, Fatih Kocer, Haluk Kulah:
Optimization of Power Conversion Efficiency in Threshold Self-Compensated UHF Rectifiers With Charge Conservation Principle. 2380-2387 - Andrea Bonetti, Adam Teman, Philippe Flatresse, Andreas Burg:
Multipliers-Driven Perturbation of Coefficients for Low-Power Operation in Reconfigurable FIR Filters. 2388-2400 - Taesik Na, Jong Hwan Ko, Saibal Mukhopadhyay:
Clock Data Compensation Aware Digital Circuits Design for Voltage Margin Reduction. 2401-2413 - Long N. Le, Douglas L. Jones:
Guided-Processing Outperforms Duty-Cycling for Energy-Efficient Systems. 2414-2426 - Muath Abu Lebdeh, Heba Abunahla, Baker Mohammad, Mahmoud Al-Qutayri:
An Efficient Heterogeneous Memristive xnor for In-Memory Computing. 2427-2437 - Anuj Grover, G. S. Visweswaran, Chittoor R. Parthasarathy, Mohammad Daud, David Turgis, Bastien Giraud, Jean-Philippe Noel, Ivan Miro Panades, Guillaume Moritz, Edith Beigné, Philippe Flatresse, Promod Kumar, Shamsi Azmi:
A 32 kb 0.35-1.2 V, 50 MHz-2.5 GHz Bit-Interleaved SRAM With 8 T SRAM Cell and Data Dependent Write Assist in 28-nm UTBB-FDSOI CMOS. 2438-2447 - Loris Duch, Soumya Basu, Rubén Braojos, Giovanni Ansaloni, Laura Pozzi, David Atienza:
HEAL-WEAR: An Ultra-Low Power Heterogeneous System for Bio-Signal Analysis. 2448-2461 - Tobias Strauch:
Connecting Things to the IoT by Using Virtual Peripherals on a Dynamically Multithreaded Cortex M3. 2462-2469 - Ningyuan Cao, Saad Bin Nasir, Shreyas Sen, Arijit Raychowdhury:
Self-Optimizing IoT Wireless Video Sensor Node With In-Situ Data Analytics and Context-Driven Energy-Aware Real-Time Adaptation. 2470-2480 - Francesco Conti, Robert Schilling, Pasquale Davide Schiavone, Antonio Pullini, Davide Rossi, Frank Kagan Gürkaynak, Michael Muehlberghuber, Michael Gautschi, Igor Loi, Germain Haugou, Stefan Mangard, Luca Benini:
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics. 2481-2494 - Jun Zhou, Amir Tofighi Zavareh, Robin Gupta, Liang Liu, Zhongfeng Wang, Brian M. Sadler, José Silva-Martínez, Sebastian Hoyos:
Compressed Level Crossing Sampling for Ultra-Low Power IoT Devices. 2495-2507 - Abbas Rahimi, Sohum Datta, Denis Kleyko, Edward Paxon Frady, Bruno A. Olshausen, Pentti Kanerva, Jan M. Rabaey:
High-Dimensional Computing as a Nanoscalable Paradigm. 2508-2521 - Szu-Chi Chung, Chun-Yuan Yu, Sung-Shine Lee, Hsie-Chia Chang, Chen-Yi Lee:
An Improved DPA Countermeasure Based on Uniform Distribution Random Power Generator for IoT Applications. 2522-2531 - Yansong Gao, Hua Ma, Derek Abbott, Said F. Al-Sarawi:
PUF Sensor: Exploiting PUF Unreliability for Secure Wireless Sensing. 2532-2543 - Carlos Andres Lara-Nino, Arturo Diaz-Perez, Miguel Morales-Sandoval:
Lightweight Hardware Architectures for the Present Cipher in FPGA. 2544-2555 - Yun Wu, John McAllister:
Bounded Selective Spanning With Extended Fast Enumeration for MIMO-OFDM Systems Detection. 2556-2568 - Zheng Song, Xiliang Liu, Xiaokun Zhao, Qiongbing Liu, Zongming Jin, Baoyong Chi:
A Low-Power NB-IoT Transceiver With Digital-Polar Transmitter in 180-nm CMOS. 2569-2581 - Georgios Angelopoulos, Arun Paidimarri, Muriel Médard, Anantha P. Chandrakasan:
A Random Linear Network Coding Accelerator in a 2.4GHz Transmitter for IoT Applications. 2582-2590 - Cheng-Ta Chiang:
A CMOS Seawater Salinity to Digital Converter for IoT Applications of Fish Farms. 2591-2597 - Nasim Shafiee, Shikhar Tewari, Benton H. Calhoun, Aatmesh Shrivastava:
Infrastructure Circuits for Lifetime Improvement of Ultra-Low Power IoT Devices. 2598-2610 - Ping-Chen Huang, Jan M. Rabaey:
A Bio-Inspired Analog Gas Sensing Front End. 2611-2623 - Muhammad Yasin, Temesghen Tekeste, Hani H. Saleh, Baker Mohammad, Ozgur Sinanoglu, Mohammed Ismail:
Ultra-Low Power, Secure IoT Platform for Predicting Cardiovascular Diseases. 2624-2637
Volume 64-I, Number 10, October 2017
- Liang Qi, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins:
A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Δ Σ Modulator With Multirate Opamp Sharing. 2641-2654 - Lieuwe B. Leene, Timothy G. Constandinou:
A 0.016 mm2 12 b Δ Σ SAR With 14 fJ/conv. for Ultra Low Power Biosensor Arrays. 2655-2665 - Chun-hsiang Chang, Seyed Alireza Zahrai, Kainan Wang, Li Xu, Ibrahim Farah, Marvin Onabajo:
An Analog Front-End Chip With Self-Calibrated Input Impedance for Monitoring of Biosignals via Dry Electrode-Skin Interfaces. 2666-2678 - Subrahmanyam Boyapati, Jean-Michel Redoute, Maryam Shojaei Baghini:
Design of A Novel Highly EMI-Immune CMOS Miller OpAmp Considering Channel Length Modulation. 2679-2690 - Sewook Hwang, Junyoung Song, Yeonho Lee, Chulwoo Kim:
A 1.62-5.4-Gb/s Receiver for DisplayPort Version 1.2a With Adaptive Equalization and Referenceless Frequency Acquisition Techniques. 2691-2702 - Tongning Hu, Shilei Hao, Qun Jane Gu:
Analysis and Design of Bang-Bang PD-Based Phase Noise Filter. 2703-2713 - Shanthi Pavan, Eric A. M. Klumperink:
Simplified Unified Analysis of Switched-RC Passive Mixers, Samplers, and N-Path Filters Using the Adjoint Network. 2714-2725 - Nan Zheng, Pinaki Mazumder:
Modeling and Mitigation of Static Noise Margin Variation in Subthreshold SRAM Cells. 2726-2736 - Tae Woo Oh, Hanwool Jeong, Juhyun Park, Seong-Ook Jung:
Pre-Charged Local Bit-Line Sharing SRAM Architecture for Near-Threshold Operation. 2737-2747 - Liviu Goras, Paul Ungureanu, Leon O. Chua:
On Turing Instability in Nonhomogeneous Reaction-Diffusion CNN's. 2748-2760 - Igor Mishkovski, Miroslav Mirchev, Sanja Scepanovic, Ljupco Kocarev:
Interplay Between Spreading and Random Walk Processes in Multiplex Networks. 2761-2771 - Juan E. Machado, Robert Griñó, Nikita E. Barabanov, Romeo Ortega, Boris T. Polyak:
On Existence of Equilibria of Multi-Port Linear AC Networks With Constant-Power Loads. 2772-2782 - Dan Zhang, Zhenhua Xu, Hamid Reza Karimi, Qing-Guo Wang:
Distributed Filtering for Switched Linear Systems With Sensor Networks in Presence of Packet Dropouts and Quantization. 2783-2796 - Kehan Zhu, Vishal Saxena:
Case Study of a Hybrid Optoelectronic Limiting Receiver. 2797-2805 - Jian Wang, Matthias Korb, Kangli Zhang, Harald Kroll, Qiuting Huang, Jibo Wei:
Parallel List Decoding of Convolutional Codes: Algorithm and Implementation. 2806-2817
Volume 64-I, Number 11, November 2017
- Ion Vornicu, Ricardo Carmona-Galán, Ángel Rodríguez-Vázquez:
Arrayable Voltage-Controlled Ring-Oscillator for Direct Time-of-Flight Image Sensors. 2821-2834 - Tianwei Liu, Xiaoran Wang, Rui Wang, Guoying Wu, Tao Zhang, Ping Gui:
A Temperature Compensated Triple-Path PLL With KVCO Non-Linearity Desensitization Capable of Operating at 77 K. 2835-2843 - Wei-Han Yu, Xingqiang Peng, Pui-In Mak, Rui Paulo Martins:
A High-Voltage-Enabled Class-D Polar PA Using Interactive AM-AM Modulation, Dynamic Matching, and Power-Gating for Average PAE Enhancement. 2844-2857 - Zhangming Zhu, Jingyu Wang:
A Compact High-Performance Programmable-Gain Analog Front End for HomePlug AV2 Communication in 0.18- $\mu \text{m}$ CMOS. 2858-2870 - Blazej Nowacki, Nuno Paulino, João Goes:
A Third-Order MASH $\Sigma \Delta $ Modulator Using Passive Integrators. 2871-2883 - Colm Mc Caffrey, Teuvo Sillanpää, Henrik Huovila, Joona Nikunen, Sami Hakulinen, Pekka Pursula:
Energy Autonomous Wireless Valve Leakage Monitoring System With Acoustic Emission Sensor. 2884-2893 - Atef Ibrahim, Fayez Gebali:
Scalable and Unified Digit-Serial Processor Array Architecture for Multiplication and Inversion Over GF( $2^{m}$ ). 2894-2906 - Xueqing Li, Sumitha George, Kaisheng Ma, Wei-Yu Tsai, Ahmedullah Aziz, John Sampson, Sumeet Kumar Gupta, Meng-Fan Chang, Yongpan Liu, Suman Datta, Vijaykrishnan Narayanan:
Advancing Nonvolatile Computing With Nonvolatile NCFET Latches and Flip-Flops. 2907-2919 - Niklas Lotze, Yiannos Manoli:
Ultra-Sub-Threshold Operation of Always-On Digital Circuits for IoT Applications by Use of Schmitt Trigger Gates. 2920-2933 - Weize Yu, Selçuk Köse:
A Lightweight Masked AES Implementation for Securing IoT Against CPA Attacks. 2934-2944 - Choon Ki Ahn, Shunyi Zhao, Yuriy S. Shmaliy:
Frequency-Efficient Receding Horizon $H_\infty $ FIR Filtering in Discrete-Time State-Space. 2945-2953 - Zhuo Wang, Naveen Verma:
A Low-Energy Machine-Learning Classifier Based on Clocked Comparators for Direct Inference on Analog Sensors. 2954-2965 - Ying Wan, Jinde Cao, Guanrong Chen, Wei Huang:
Distributed Observer-Based Cyber-Security Control of Complex Dynamical Networks. 2966-2975 - Seong Joong Kim, Chang Soon Park, Sang-Gug Lee:
A 2.4-GHz Ternary Sequence Spread Spectrum OOK Transceiver for Reliable and Ultra-Low Power Sensor Network Applications. 2976-2987 - Imad ud Din, Johan Wernehag, Stefan Andersson, Henrik Sjöland:
Two Tunable Frequency Duplexer Architectures for Cellular Transceivers. 2988-2999
Volume 64-I, Number 12, December 2017
- Domenico Zito, Jaswinder Lota:
Guest Editorial 2017 Special Issue on CASS Regional Flagship Conferences. 3001-3002 - Lieuwe B. Leene, Timothy G. Constandinou:
Time Domain Processing Techniques Using Ring Oscillator-Based Filter Structures. 3003-3012 - Dominic A. Funke, Philipp Hillger, Jürgen Oehm, Pierre Mayr, Lukas Straczek, Nils Pohl, John S. McCaskill:
A 200~µm by 100~µm Smart Submersible System With an Average Current Consumption of 1.3nA and a Compatible Voltage Converter. 3013-3024 - Luca Aluigi, Domenico Pepe, Federico Alimenti, Domenico Zito:
K-Band SiGe System-on-Chip Radiometric Receiver for Remote Sensing of the Atmosphere. 3025-3035 - Arthur Campos de Oliveira, David Cordova, Hamilton Klimach, Sergio Bampi:
Picowatt, 0.45-0.6 V Self-Biased Subthreshold CMOS Voltage Reference. 3036-3046 - Arantxa Uranga, Guillermo Sobreviela, Martí Riverola, Francesc Torres, Núria Barniol:
Phase-Noise Reduction in a CMOS-MEMS Oscillator Under Nonlinear MEMS Operation. 3047-3055 - Sara S. Ghoreishizadeh, Dorian Haci, Yan Liu, Nick Donaldson, Timothy G. Constandinou:
Four-Wire Interface ASIC for a Multi-Implant Link. 3056-3067 - Gerardo Castellano, Daniele Montanari, Davide De Caro, Danilo Manstretta, Antonio Giuseppe Maria Strollo:
An Efficient Digital Background Control for Hybrid Transformer-Based Receivers. 3068-3080 - Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira:
Optimum nMOS/pMOS Imbalance for Energy Efficient Digital Circuits. 3081-3091 - Jiacong He, Joseph Callenes-Sloan:
A Novel Architecture of Large Hybrid Cache With Reduced Energy. 3092-3102 - Anastasios Psarras, Savvas Moisidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos:
Networks-on-Chip With Double-Data-Rate Links. 3103-3114 - Saurabh Jain, Longyang Lin, Massimo Alioto:
Design-Oriented Energy Models for Wide Voltage Scaling Down to the Minimum Energy Point. 3115-3125 - Bianca Silveira, Guilherme Paim, Brunno Abreu, Mateus Grellert, Cláudio Machado Diniz, Eduardo A. C. da Costa, Sergio Bampi:
Power-Efficient Sum of Absolute Differences Hardware Architecture Using Adder Compressors for Integer Motion Estimation Design. 3126-3137 - Chao Qun Liu, Yuan Cao, Chip-Hong Chang:
ACRO-PUF: A Low-power, Reliable and Aging-Resilient Current Starved Inverter-Based Ring Oscillator Physical Unclonable Function. 3138-3149 - Jochen Rust, Pascal Seidel, Benjamin Knoop, Steffen Paul:
Hardware-Efficient QR-Decomposition Using Bivariate Numeric Function Approximation. 3150-3159 - Chang-Hyun Oh, Sae-Eun Kim, Joon-Sung Yang:
BIRA With Optimal Repair Rate Using Fault-Free Memory Region for Area Reduction. 3160-3171 - Kun-Lin Lin, Shao-Yun Fang, Yun-Xiang Hong:
Design Optimization Considering Guiding Template Feasibility and Redundant Via Insertion for Directed Self-Assembly. 3172-3182 - Jieming Ma, Haochuan Jiang, Kaizhu Huang, Ziqiang Bi, Ka Lok Man:
Novel Field-Support Vector Regression-Based Soft Sensor for Accurate Estimation of Solar Irradiance. 3183-3191 - Gain Kim, Thierry Barailler, Chen Cao, Kiarash Gharibdoust, Yusuf Leblebici:
Design and Modeling of Serial Data Transceiver Architecture by Employing Multi-Tone Single-Sideband Signaling Scheme. 3192-3201
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