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2010 – 2019
- 2018
[j5]Kien Trinh Quang
, Sergio Ruocco, Massimo Alioto:
Dynamic Reference Voltage Sensing Scheme for Read Margin Improvement in STT-MRAMs. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4): 1269-1278 (2018)- [j4]Kien Trinh Quang, Sergio Ruocco, Massimo Alioto:
Time-Based Sensing for Reference-Less and Robust Read in STT-MRAM Memories. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3338-3348 (2018) - [c7]Kien Trinh Quang, Sergio Ruocco, Massimo Alioto:
Novel Time-Based Sensing Scheme for STT-MRAMs. ISCAS 2018: 1-5 - 2016
- [j3]Kien Trinh Quang, Sergio Ruocco, Massimo Alioto:
Voltage Scaled STT-MRAMs Towards Minimum-Energy Write Access. IEEE J. Emerg. Sel. Topics Circuits Syst. 6(3): 305-318 (2016) - [j2]Kien Trinh Quang, Sergio Ruocco, Massimo Alioto:
Novel Boosted-Voltage Sensing Scheme for Variation-Resilient STT-MRAM Read. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(10): 1652-1660 (2016) - [c6]Kien Trinh Quang, Sergio Ruocco, Massimo Alioto:
Boosted sensing for enhanced read stability in STT-MRAMs. ISCAS 2016: 1238-1241 - [c5]Kien Trinh Quang, Sergio Ruocco, Massimo Alioto:
STT-MRAM write energy minimization via area optimization under dynamic voltage Scaling. ISCAS 2016: 2791-2794 - 2015
- [c4]Sergio Ruocco, Duy-Khanh Le:
Efficient Persistence of Financial Transactions in NVM-based Cloud Data Centers. ICCCRI 2015: 25-36 - [c3]Kien Trinh Quang, Sergio Ruocco, Massimo Alioto:
Modeling the impact of dynamic voltage scaling on 1T-1J STT-RAM write energy and performance. ISCAS 2015: 2313-2316
2000 – 2009
- 2008
- [j1]Sergio Ruocco:
A Real-Time Programmer's Tour of General-Purpose L4 Microkernels. EURASIP J. Embed. Syst. 2008 (2008) - 2006
- [c2]Sergio Ruocco:
User-Level Fine-Grained Adaptive Real-Time Scheduling via Temporal Reflection. RTSS 2006: 246-256 - 2004
- [c1]Daniela Micucci, Sergio Ruocco, Francesco Tisato, Andrea Trentini:
Time Sensitive Architectures: A Reflective Approach. ISORC 2004: 183-192
Coauthor Index
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