"Circuit design perspectives for Ge FinFET at 10nm and beyond."

Saurabh Sinha et al. (2015)

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DOI: 10.1109/ISQED.2015.7085398

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-25

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Saurabh Sinha, Lucian Shifren, Vikas Chandra, Brian Cline, Greg Yeric, Robert C. Aitken, Bingjie Cheng, Andrew R. Brown, Craig Riddet, C. Alexandar, Campbell Millar, Asen Asenov:
Circuit design perspectives for Ge FinFET at 10nm and beyond. ISQED 2015: 57-60

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