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ORCIDT. S. Bindiya
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2020 – today
- 2024
[j20]Mrinmay Sasmal
, Tresa Joseph, T. S. Bindiya:
Approximate Multiplier Design With LFSR-Based Stochastic Sequence Generators for Edge AI. IEEE Comput. Archit. Lett. 23(1): 91-94 (2024)- [j19]Hareesh V., T. S. Bindiya:
An Improved Rational Approximation of Bark Scale Using Low Complexity and Low Delay Filter Banks. Circuits Syst. Signal Process. 43(9): 5591-5623 (2024) - 2023
- [j18]K. R. Sreelekha, T. S. Bindiya:
Development of a 2D Filter Architecture to Obtain Circular Bandwidths Varied by Arbitrary Rational Values Without Restructuring. Circuits Syst. Signal Process. 42(9): 5523-5544 (2023) - [j17]Tresa Joseph, T. S. Bindiya:
Performance-Driven LSTM Accelerator Hardware Using Split-Matrix-Based MVM. Circuits Syst. Signal Process. 42(11): 6660-6683 (2023) - [j16]Tresa Joseph, T. S. Bindiya:
Power and Delay-Efficient Matrix Vector Multiplier Units for the LSTM Networks Using Activity Span Reduction Technique and Recursive Adders. Circuits Syst. Signal Process. 42(12): 7494-7528 (2023) - [j15]K. R. Sreelekha, T. S. Bindiya:
Design of cost effective variable bandwidth 2D low-pass, high-pass and band-pass filters with improved circularity. Digit. Signal Process. 133: 103842 (2023) - [j14]K. R. Sreelekha, T. S. Bindiya:
Development of variable 2D FIR filter structures using farrow approximation and row-wise polyphase decomposition. Digit. Signal Process. 141: 104140 (2023) - [j13]Tresa Joseph, T. S. Bindiya:
Realization and Hardware Implementation of Gating Units for Long Short-Term Memory Network Using Hyperbolic Sine Functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 5141-5145 (2023) - 2022
- [j12]Hareesh V., T. S. Bindiya:
Design of Hardware Efficient Reconfigurable Merged Partial Cosine Modulated Non-uniform Filter Bank Channelizer and its Power Efficient Implementation Using a Novel Approximation Algorithm. Circuits Syst. Signal Process. 41(4): 2118-2135 (2022) - [j11]K. R. Sreelekha, T. S. Bindiya:
Design of variable elliptical filters with direct tunability in 2D domain. Multidimens. Syst. Signal Process. 33(2): 367-400 (2022) - 2021
- [j10]Sudhi Sudharman, T. S. Bindiya:
Design of Reconfigurable FRM Channelizer using Resource Shared Non-maximally Decimated Masking Filters. J. Signal Process. Syst. 93(8): 913-922 (2021) - [c5]Tresa Joseph, T. S. Bindiya:
High Speed and Power Efficient Multiplexer based Matrix Vector Multiplication for LSTM Network. VDAT 2021: 1-4 - 2020
- [j9]Hareesh V., T. S. Bindiya:
Design of Low-Complex Linear-Phase Non-uniform Filter Bank to Realize Wavelet Approximation of Bark Frequency Partitioning for Real-Time Applications. Circuits Syst. Signal Process. 39(9): 4623-4649 (2020) - [j8]Hareesh V., T. S. Bindiya:
Analysis of Different Rational Decimated Filter Banks Derived From the Same Set of Prototype Filters. IEEE Trans. Signal Process. 68: 1923-1936 (2020) - [c4]Sudhi Sudharman, T. S. Bindiya:
Multiplier-free Realization of High Throughout Transpose Form FIR Filter. CSNDSP 2020: 1-5
2010 – 2019
- 2019
- [j7]Amir A., T. S. Bindiya, Elizabeth Elias:
Low-complexity implementation of efficient reconfigurable structure for cost-effective hearing aids using fractional interpolation. Comput. Electr. Eng. 74: 391-412 (2019) - [j6]Sudhi Sudharman, Athul D. Rajan, T. S. Bindiya:
Design of a Power-Efficient Low-Complexity Reconfigurable Non-maximally Decimated Filter Bank for High-Resolution Wideband Channels. Circuits Syst. Signal Process. 38(6): 2703-2735 (2019) - [j5]Sudhi Sudharman, T. S. Bindiya:
Design of Power Efficient Variable Bandwidth Non-Maximally Decimated FRM Filters for Wideband Channelizer. IEEE Trans. Circuits Syst. II Express Briefs 66-II(9): 1597-1601 (2019) - [c3]Sudhi Sudharman, T. S. Bindiya:
Design and Implementation of Maximally Decimated Polyphase Filter Bank for Power and Delay Efficient Digital Hearing Aids. TENCON 2019: 1329-1334 - [c2]K. R. Sreelekha, T. S. Bindiya:
A New Multiplier-free Transformation for the Design of Hardware Efficient Circularly Symmetric Wideband 2D Filters. TENCON 2019: 2376-2381 - 2018
- [j4]Amir A., T. S. Bindiya, Elizabeth Elias:
Design and implementation of reconfigurable filter bank structure for low complexity hearing aids using 2-level sound wave decomposition. Biomed. Signal Process. Control. 43: 96-109 (2018) - 2017
- [c1]Sudhi Sudharman, T. S. Bindiya:
Reconfigurable Non-Maximally Decimated Filter Bank based wideband channelizer for VLBI. CCECE 2017: 1-4 - 2016
- [j3]T. S. Bindiya, Elizabeth Elias:
Meta-heuristic evolutionary algorithms for the design of optimal multiplier-less recombination filter banks. Inf. Sci. 339: 31-52 (2016) - 2014
- [j2]T. S. Bindiya, Elizabeth Elias:
Modified Metaheuristic Algorithms for the Optimal Design of Multiplier-Less Non-uniform Channel Filters. Circuits Syst. Signal Process. 33(3): 815-837 (2014) - [j1]T. S. Bindiya, Elizabeth Elias:
Metaheuristic algorithms for the design of multiplier-less non-uniform filter banks based on frequency response masking. Soft Comput. 18(8): 1529-1547 (2014)
Coauthor Index
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