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The DSPCAD Framework for Modeling and Synthesis of Signal Processing Systems

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Handbook of Hardware/Software Codesign

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Abstract

With domain-specific models of computation and widely-used hardware acceleration techniques, Hardware/Software Codesign (HSCD) has the potential of being as agile as traditional software design, while approaching the performance of custom hardware. However, due to increasing use of system heterogeneity, multi-core processors, and hardware accelerators, along with traditional software development challenges, codesign processes for complex systems are often slow and error prone. The purpose of this chapter is to discuss a Computer-Aided Design (CAD) framework, called the DSPCAD Framework, that addresses some of these key development issues for the broad domain of Digital Signal Processing (DSP) systems. The emphasis in the DSPCAD Framework on supporting cross-platform, domain-specific approaches enables designers to rapidly arrive at initial implementations for early feedback, and then systematically refine them towards functionally correct and efficient solutions. The DSPCAD Framework is centered on three complementary tools – the Data-flow Interchange Format (DIF), LIghtweight Data-flow Environment (LIDE) and DSPCAD Integrative Command Line Environment (DICE), which support flexible design experimentation and orthogonalization across three major dimensions in model-based DSP system design – abstract data-flow models, actor implementation languages, and integration with platform-specific design tools. We demonstrate the utility of the DSPCAD Framework through a case study involving the mapping of synchronous data-flow graphs onto hybrid CPU-GPU platforms.

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Abbreviations

ADT:

Abstract Data Type

API:

Application Programming Interface

BDF:

Boolean Data Flow

BPSK:

Binary PSK

CAD:

Computer-Aided Design

CAL:

Cal Actor Language

CFDF:

Core Functional Data Flow

CPU:

Central Processing Unit

CSDF:

Cyclo-Static Data Flow

CUDA:

Compute Unified Device Architecture

D2H:

Device-to-Host

DICE:

DSPCAD Integrative Command Line Environment

DIF:

Data-flow Interchange Format

DSP:

Digital Signal Processing

FCFS:

First-Come First-Serve

FIFO:

First-In First-Out

FIR:

Finite Impulse Response

FPGA:

Field-Programmable Gate Array

FSM:

Finite-State Machine

GLV:

Graph-Level Vectorization

GPU:

Graphics Processing Unit

H2D:

Host-to-Device

HDL:

Hardware Description Language

HSCD:

Hardware/Software Codesign

ITS:

Individual Test Subdirectory

LIDE:

LIghtweight Data-flow Environment

MDSDF:

Multi-Dimensional Synchronous Data Flow

MILP:

Mixed Integer Linear Programming

PREESM:

Parallel and Real-time Embedded Executives Scheduling Method

PSDF:

Parameterized Synchronous Data Flow

PSK:

Phase Shift Keying

PSM:

Parameterized Sets of Modes

QAM:

Quadrature Amplitude Modulation

QPSK:

Quadrature PSK

RVC:

Reconfigurable Video Coding

SADF:

Scenario-Aware Data Flow

SDF:

Synchronous Data Flow

SDR:

Software Defined Radio

SDTC:

Scheduling and Data Transfer Configuration

SysteMoC:

SystemC Models of Computation

VF:

Vectorization Factor

WSDF:

Windowed Synchronous Data Flow

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Acknowledgements

Research on the DSPCAD Framework has been supported in part by the US National Science Foundation, Laboratory for Telecommunication Sciences, and Tekes – The Finnish Funding Agency For Innovation.

Author information

Authors and Affiliations

  1. Department of Electrical and Computer Engineering, University of Maryland, College Park, MD, USA

    Shuoxin Lin, Yanzhou Liu, Kyunghun Lee, Lin Li & William Plishker

  2. Department of Electrical and Computer Engineering and Institute for Advanced Computer Studies, University of Maryland, College Park, MD, USA

    Shuvra S. Bhattacharyya

  3. Department of Pervasive Computing, Tampere University of Technology, Tampere, Finland

    Shuvra S. Bhattacharyya

Authors
  1. Shuoxin Lin
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  2. Yanzhou Liu
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  3. Kyunghun Lee
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  4. Lin Li
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  6. Shuvra S. Bhattacharyya
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Correspondence to Shuoxin Lin .

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Editors and Affiliations

  1. Department of Computer Science and Engineering, Seoul National University, Seoul, Korea (Republic of)

    Soonhoi Ha

  2. Department of Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Erlangen, Germany

    Jürgen Teich

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Lin, S., Liu, Y., Lee, K., Li, L., Plishker, W., Bhattacharyya, S.S. (2017). The DSPCAD Framework for Modeling and Synthesis of Signal Processing Systems. In: Ha, S., Teich, J. (eds) Handbook of Hardware/Software Codesign. Springer, Dordrecht. https://doi.org/10.1007/978-94-017-7267-9_36

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