In this paper we propose that family background variables are significant in earnings equations b... more In this paper we propose that family background variables are significant in earnings equations because they measure investments in children made by families in the home, over and above formal schooling investments and schooling quality. Together these variables account for a significant proportion of the difference between estimated rates of return to schooling across racial groups. Using data from the NLSY, we observe a convergence of rates of return across racial groups after accounting for differences in these variables. The estimated equations are used to predict that average minority earnings would be almost identical to white earnings if minorities experienced the same family background and school quality as whites. (JEL J13, J24, J31) 1. O'Neill (1990) provides a recent evaluation of the earnings differential between black and white males, but does not consider other racial groups.
Page 1. MANAGEMENT SCIENCE Vol. 30, No. 12, December 1984 Printed in USA DIFFERENT MEASURES OF WI... more Page 1. MANAGEMENT SCIENCE Vol. 30, No. 12, December 1984 Printed in USA DIFFERENT MEASURES OF WIN RATE FOR OPTIMAL PROPORTIONAL BETTING* PETER A. GRIFFIN Department of Mathematics and Statistics ...
RECENT YEARS have seen a flurry of research activity into memory technologies that aim to overcom... more RECENT YEARS have seen a flurry of research activity into memory technologies that aim to overcome the den-sity limitation of Flash, the volatility limitation of static random access memory (SRAM) or dynamic random access memory (DRAM), or the speed limitation of hard ...
A nonvolatile SRAM cell with two back-up nonvolatile memory devices is proposed. This novel cell ... more A nonvolatile SRAM cell with two back-up nonvolatile memory devices is proposed. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty. A slight performance penalty is anticipated
Nonvolatile information storage devices based on an abrupt resistance switch when an electric bia... more Nonvolatile information storage devices based on an abrupt resistance switch when an electric bias is applied are very attractive for future memory applications. Recently, such a resistance switch was described in ferroelectric ZnxCd1-xS, but the mechanism of switching remains controversial. Here, we present results that elucidate the mechanism, showing that a metal needs to be easily oxidized and is capable of diffusing into the ZnCdS film as a cation impurity forming a filamentary metallic conduction path
One of the fundamental problems in the continued scaling of transistors is the 60 mV/dec room tem... more One of the fundamental problems in the continued scaling of transistors is the 60 mV/dec room temperature limit in the subthreshold slope. In part I this work, a novel transistor based on the field-effect control of impact-ionization (I-MOS) is explored through detailed device and circuit simulations. The I-MOS uses gated-modulation of the breakdown voltage of a p-i-n diode to switch from the OFF state to the ON state and vice-versa. Device simulations using MEDICI show that the I-MOS has a subthreshold slope of 5 mV/dec or lower and ON 1 mA m at 400 K. Simulations were used to further explore the characteristics of the I-MOS including the transients of the turn-on mechanism, the short-channel effect, scalability, and other important device attributes. Circuit mode simulations were also used to explore circuit design using I-MOS devices and the design of an I-MOS inverter. These simulations indicated that the I-MOS has the potential to replace CMOS in high performance and low power digital applications. Part II of this work focuses on I-MOS experimental results with emphasis on hot carrier effects, germanium p-i-n data and breakdown in recessed structure devices.
An identical set of thermal oxidation and nitridation experiments has been performed for four com... more An identical set of thermal oxidation and nitridation experiments has been performed for four common dopants and self-diffusion in Si. Selectively perturbing the equilibrium point-defect concentrations by these surface reactions is a powerful tool for identifying the relative importance of the various atomic-scale diffusion mechanisms. We obtain bounds on the fractional contributions of the self-interstitial, vacancy, and concerted exchange mechanisms for arsenic, boron, phosphorus, antimony, and self-diffusion in Si at temperatures of 1100 and 1000°C. These bounds are found by simultaneously solving a system of equations making only very conservative assumptions. The validity of common approximations found in previous work and their effects on the results are also analyzed in detail. We find that B and P diffuse by a self-interstitial mechanism, whereas Sb diffusion is almost exclusively vacancy mediated. As and self-diffusion, on the other hand, exhibit evidence for a dual vacancy-interstitial mechanism with the possibility of some concerted exchange component.
Physically robust diffusion models are required to simulate two-dimensional (2D) impurity profile... more Physically robust diffusion models are required to simulate two-dimensional (2D) impurity profiles in VLSI devices. The accuracy of the initial dopant profiles severely limits the predictive capability of 2D device simulators. Historically, the most successful diffusion models have been based on point defect mechanisms involving either vacancy or in terstitial assisted diffusion. It is clear that the local con centration of defects determines the local diffusion coeffi cient, so the ability to model the point defect kinetics is essential for obtaining accurate 2D dopant profiles. We de scribe a series of kinetics experiments using 2D process test structures, which, when coupled with a 2D diffusion solver enable quantitative values for the generation, diffusion and surface recombination kinetics of the point defects to be obtained. The physical insight this work provides forms the basis of the diffusion models in the new 2D process simulator SUPREM-IV [1].
Charge trapping at the interface between the two dielectric layers of a high-k gate stack is show... more Charge trapping at the interface between the two dielectric layers of a high-k gate stack is shown to be caused by Maxwell-Wagner instability, which is the following. The fact that the high-k and interfacial layers have different compositions means that they will also have different conductivities. Then, a gate bias will produce a discontinuity in current at their interface, causing charge to accumulate there until, in steady state, the same current flows through both layers. Maxwell-Wagner instability is shown to be coupled to a second instability, dielectric relaxation of the high-k layer; continuity of current in steady state requires that the electric fields in the two dielectric layers remain fixed, so the change in polarization of the high-k layer due to dielectric relaxation must be compensated for by the conduction of additional charge to the interface. Evidence for this behavior in high-k gate stacks is found in the thickness dependence of their dielectric relaxation current, with the correct dependence being obtained only from a model in which the two instabilities act simultaneously. Uniform dielectrics do not exhibit Maxwell-Wagner instability, and perfect crystals do not exhibit dielectric relaxation, making the ideal high-k gate dielectric a uniform single-layer perfect crystal bonded epitaxially to the Si substrate.
Ultra-low energy implants were used in combination with rapid thermal anneals in the temperature ... more Ultra-low energy implants were used in combination with rapid thermal anneals in the temperature range 900 C-1050 C to study dopant activation in silicon. First, relatively long time anneals were performed in a conventional tungsten-based RTA to investigate the activation mechanisms. The activation was monitored using Hall measurement, where the rate of electrical activation was considered by measuring the time it takes to reach 50% activation. Using Arrhenius fits, an activation energy was extracted, and it was found that while boron has a mean activation energy for electrical activation of 4.7 eV in agreement with previous studies, arsenic and phosphorus have thermal activation energies of 3.6 eV and 4.1 eV, respectively. The 4.7 eV activation energy for boron is believed to be related to a point defect driven mechanism for electrical activation. Electrical activation of arsenic and phosphorus, however, seems to be related to dopant diffusion. In the second set of experiments, an arc lamp system was utilized to perform ultra-sharp spike anneals and to analyze the effect of both ramp-up and ramp-down on boron and arsenic activation and diffusion. For both dopants, it was found that for a given temperature, there is an optimum ramp-rate that produces the desired dopant activation and junction depth.
We have demonstrated symmetrically high levels of electrical activation of both p-and n-type dopa... more We have demonstrated symmetrically high levels of electrical activation of both p-and n-type dopants in germanium. Rapid thermal annealing of various commonly implanted dopant species were performed in the temperature range of 600-850°C in germanium substrates. Diffusion studies were also carried out by using different anneal times and temperatures. T-SUPREM™ simulations were used to fit the experimental profiles and to extract the diffusion coefficient of various dopants.
Pyrosequencing is a DNA sequencing technique based on sequencing-by-synthesis enabling rapid real... more Pyrosequencing is a DNA sequencing technique based on sequencing-by-synthesis enabling rapid real-time sequence determination. This technique employs four enzymatic reactions in a single tube to monitor DNA synthesis. Nucleotides are added iteratively to the reaction and in case of incorporation, pyrophosphate (PPi) is released. PPi triggers a series of reactions resulting in production of light, which is proportional to the amount of DNA and number of incorporated nucleotides. Generated light is detected and recorded by a detector system in the form of a peak signal, which reflects the activity of all four enzymes in the reaction. We have developed simulations to model the kinetics of the enzymes. These simulations provide a full model for the Pyrosequencing four-enzyme system, based on which the peak height and shape can be predicted depending on the concentrations of enzymes and substrates. Simulation results are shown to be compatible with experimental data. Based on these simulations, the rate-limiting steps in the chain can be determined, and K M and k cat of all four enzymes in Pyrosequencing can be calculated.
The integrated circuit (IC) industry has followed a steady path of shrinking device geometries fo... more The integrated circuit (IC) industry has followed a steady path of shrinking device geometries for more than 30 years. It is widely believed that this process will continue for at least another ten years. However, there are increasingly difficult materials and technology problems to be solved over the next decade if this is to actually occur and, beyond ten years, there is great uncertainty about the ability to continue scaling metal-oxide-semiconductor field-effect transistor (MOSFET) structures. This paper describes some of the most challenging materials and process issues to be faced in the future and, where possible solutions are known, describes these potential solutions. The paper is written with the underlying assumption that the basic metal-oxide-semiconductor (MOS) transistor will remain the dominant switching device used in ICs and it further assumes that silicon will remain the dominant substrate material. He is currently a Research Scientist at Stanford University. He has authored or coauthored more than 50 technical papers, coauthored a new textbook on Silicon VLSI Technology, and consults on advanced process technology with industry. His current research interests are aimed at developing atomistic insights into the fabrication process for silicon devices by a mix of experimental and computational methods.
The monolithic integration of germanium-on-insulator (GeOI) p-MOSFETs with silicon n-MOSFETs on a... more The monolithic integration of germanium-on-insulator (GeOI) p-MOSFETs with silicon n-MOSFETs on a silicon substrate is demonstrated. The GeOI p-MOSFETs are fabricated on the oxide for silicon device isolation based on the newly developed rapid-melt-growth method. CMOS inverters consisting of the silicon n-MOSFET and GeOI p-MOSFET were obtained, and the measured results show that the processing of high-performance GeOI devices is compatible with bulk-silicon technology.
First principles calculations aimed at quantifying the effects of zirconium and hafnium incorpora... more First principles calculations aimed at quantifying the effects of zirconium and hafnium incorporation at a model silicon/silicate interface have been performed. The tetrahedral bonding character of silicates allows useful comparisons as well as important new distinctions to be drawn with the familiar Si/SiO 2 system. The calculated energy cost of forming (Zr, Hf)-Si bonds suggests that SiO 2 -like bonding is energetically favored over silicide-like bonding at the Si interface. The calculations also suggest that the volume strain associated with Zr or Hf incorporation may lead to increased stress, both in the bulk oxide and in the interfacial transition region.
This paper presents a detailed study of the impact of lateral doping abruptness in the source/dra... more This paper presents a detailed study of the impact of lateral doping abruptness in the source/drain extension region and the gate-extension overlap length on device performance. Proper choice of the metric used to compare the different device designs is essential. Series resistance and threshold voltage roll-offs are shown to be incomplete measures of device performance that could lead to inconsistent lateral abruptness requirements. While series resistance is seen to improve with increasing junction abruptness, threshold voltage roll-off could be degraded by both lateral junctions that are too gradual and too abrupt - in contrast to the conventional scaling assumptions. The Ion (supernominal)-Ioff (subnominal) plot, which takes into account statistical variations of gate length, is proposed as a good metric for comparing different device technology designs. Gate-extension overlap length is shown to interact with lateral doping abruptness and to have a significant impact on device performance.
Junction formation using solid phase epitaxial (SPE) regrowth has been gaining popularity due to ... more Junction formation using solid phase epitaxial (SPE) regrowth has been gaining popularity due to its high activation and low thermal budget which results in lower diffusion. Recently, it was shown that by carrying out the SPE regrowth at 1050 C using a single Flash from a millisecond annealing tool it is possible to obtain active concentrations as high as 6 5 10 20 /cm 3 (Flash
In this paper we propose that family background variables are significant in earnings equations b... more In this paper we propose that family background variables are significant in earnings equations because they measure investments in children made by families in the home, over and above formal schooling investments and schooling quality. Together these variables account for a significant proportion of the difference between estimated rates of return to schooling across racial groups. Using data from the NLSY, we observe a convergence of rates of return across racial groups after accounting for differences in these variables. The estimated equations are used to predict that average minority earnings would be almost identical to white earnings if minorities experienced the same family background and school quality as whites. (JEL J13, J24, J31) 1. O'Neill (1990) provides a recent evaluation of the earnings differential between black and white males, but does not consider other racial groups.
Page 1. MANAGEMENT SCIENCE Vol. 30, No. 12, December 1984 Printed in USA DIFFERENT MEASURES OF WI... more Page 1. MANAGEMENT SCIENCE Vol. 30, No. 12, December 1984 Printed in USA DIFFERENT MEASURES OF WIN RATE FOR OPTIMAL PROPORTIONAL BETTING* PETER A. GRIFFIN Department of Mathematics and Statistics ...
RECENT YEARS have seen a flurry of research activity into memory technologies that aim to overcom... more RECENT YEARS have seen a flurry of research activity into memory technologies that aim to overcome the den-sity limitation of Flash, the volatility limitation of static random access memory (SRAM) or dynamic random access memory (DRAM), or the speed limitation of hard ...
A nonvolatile SRAM cell with two back-up nonvolatile memory devices is proposed. This novel cell ... more A nonvolatile SRAM cell with two back-up nonvolatile memory devices is proposed. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty. A slight performance penalty is anticipated
Nonvolatile information storage devices based on an abrupt resistance switch when an electric bia... more Nonvolatile information storage devices based on an abrupt resistance switch when an electric bias is applied are very attractive for future memory applications. Recently, such a resistance switch was described in ferroelectric ZnxCd1-xS, but the mechanism of switching remains controversial. Here, we present results that elucidate the mechanism, showing that a metal needs to be easily oxidized and is capable of diffusing into the ZnCdS film as a cation impurity forming a filamentary metallic conduction path
One of the fundamental problems in the continued scaling of transistors is the 60 mV/dec room tem... more One of the fundamental problems in the continued scaling of transistors is the 60 mV/dec room temperature limit in the subthreshold slope. In part I this work, a novel transistor based on the field-effect control of impact-ionization (I-MOS) is explored through detailed device and circuit simulations. The I-MOS uses gated-modulation of the breakdown voltage of a p-i-n diode to switch from the OFF state to the ON state and vice-versa. Device simulations using MEDICI show that the I-MOS has a subthreshold slope of 5 mV/dec or lower and ON 1 mA m at 400 K. Simulations were used to further explore the characteristics of the I-MOS including the transients of the turn-on mechanism, the short-channel effect, scalability, and other important device attributes. Circuit mode simulations were also used to explore circuit design using I-MOS devices and the design of an I-MOS inverter. These simulations indicated that the I-MOS has the potential to replace CMOS in high performance and low power digital applications. Part II of this work focuses on I-MOS experimental results with emphasis on hot carrier effects, germanium p-i-n data and breakdown in recessed structure devices.
An identical set of thermal oxidation and nitridation experiments has been performed for four com... more An identical set of thermal oxidation and nitridation experiments has been performed for four common dopants and self-diffusion in Si. Selectively perturbing the equilibrium point-defect concentrations by these surface reactions is a powerful tool for identifying the relative importance of the various atomic-scale diffusion mechanisms. We obtain bounds on the fractional contributions of the self-interstitial, vacancy, and concerted exchange mechanisms for arsenic, boron, phosphorus, antimony, and self-diffusion in Si at temperatures of 1100 and 1000°C. These bounds are found by simultaneously solving a system of equations making only very conservative assumptions. The validity of common approximations found in previous work and their effects on the results are also analyzed in detail. We find that B and P diffuse by a self-interstitial mechanism, whereas Sb diffusion is almost exclusively vacancy mediated. As and self-diffusion, on the other hand, exhibit evidence for a dual vacancy-interstitial mechanism with the possibility of some concerted exchange component.
Physically robust diffusion models are required to simulate two-dimensional (2D) impurity profile... more Physically robust diffusion models are required to simulate two-dimensional (2D) impurity profiles in VLSI devices. The accuracy of the initial dopant profiles severely limits the predictive capability of 2D device simulators. Historically, the most successful diffusion models have been based on point defect mechanisms involving either vacancy or in terstitial assisted diffusion. It is clear that the local con centration of defects determines the local diffusion coeffi cient, so the ability to model the point defect kinetics is essential for obtaining accurate 2D dopant profiles. We de scribe a series of kinetics experiments using 2D process test structures, which, when coupled with a 2D diffusion solver enable quantitative values for the generation, diffusion and surface recombination kinetics of the point defects to be obtained. The physical insight this work provides forms the basis of the diffusion models in the new 2D process simulator SUPREM-IV [1].
Charge trapping at the interface between the two dielectric layers of a high-k gate stack is show... more Charge trapping at the interface between the two dielectric layers of a high-k gate stack is shown to be caused by Maxwell-Wagner instability, which is the following. The fact that the high-k and interfacial layers have different compositions means that they will also have different conductivities. Then, a gate bias will produce a discontinuity in current at their interface, causing charge to accumulate there until, in steady state, the same current flows through both layers. Maxwell-Wagner instability is shown to be coupled to a second instability, dielectric relaxation of the high-k layer; continuity of current in steady state requires that the electric fields in the two dielectric layers remain fixed, so the change in polarization of the high-k layer due to dielectric relaxation must be compensated for by the conduction of additional charge to the interface. Evidence for this behavior in high-k gate stacks is found in the thickness dependence of their dielectric relaxation current, with the correct dependence being obtained only from a model in which the two instabilities act simultaneously. Uniform dielectrics do not exhibit Maxwell-Wagner instability, and perfect crystals do not exhibit dielectric relaxation, making the ideal high-k gate dielectric a uniform single-layer perfect crystal bonded epitaxially to the Si substrate.
Ultra-low energy implants were used in combination with rapid thermal anneals in the temperature ... more Ultra-low energy implants were used in combination with rapid thermal anneals in the temperature range 900 C-1050 C to study dopant activation in silicon. First, relatively long time anneals were performed in a conventional tungsten-based RTA to investigate the activation mechanisms. The activation was monitored using Hall measurement, where the rate of electrical activation was considered by measuring the time it takes to reach 50% activation. Using Arrhenius fits, an activation energy was extracted, and it was found that while boron has a mean activation energy for electrical activation of 4.7 eV in agreement with previous studies, arsenic and phosphorus have thermal activation energies of 3.6 eV and 4.1 eV, respectively. The 4.7 eV activation energy for boron is believed to be related to a point defect driven mechanism for electrical activation. Electrical activation of arsenic and phosphorus, however, seems to be related to dopant diffusion. In the second set of experiments, an arc lamp system was utilized to perform ultra-sharp spike anneals and to analyze the effect of both ramp-up and ramp-down on boron and arsenic activation and diffusion. For both dopants, it was found that for a given temperature, there is an optimum ramp-rate that produces the desired dopant activation and junction depth.
We have demonstrated symmetrically high levels of electrical activation of both p-and n-type dopa... more We have demonstrated symmetrically high levels of electrical activation of both p-and n-type dopants in germanium. Rapid thermal annealing of various commonly implanted dopant species were performed in the temperature range of 600-850°C in germanium substrates. Diffusion studies were also carried out by using different anneal times and temperatures. T-SUPREM™ simulations were used to fit the experimental profiles and to extract the diffusion coefficient of various dopants.
Pyrosequencing is a DNA sequencing technique based on sequencing-by-synthesis enabling rapid real... more Pyrosequencing is a DNA sequencing technique based on sequencing-by-synthesis enabling rapid real-time sequence determination. This technique employs four enzymatic reactions in a single tube to monitor DNA synthesis. Nucleotides are added iteratively to the reaction and in case of incorporation, pyrophosphate (PPi) is released. PPi triggers a series of reactions resulting in production of light, which is proportional to the amount of DNA and number of incorporated nucleotides. Generated light is detected and recorded by a detector system in the form of a peak signal, which reflects the activity of all four enzymes in the reaction. We have developed simulations to model the kinetics of the enzymes. These simulations provide a full model for the Pyrosequencing four-enzyme system, based on which the peak height and shape can be predicted depending on the concentrations of enzymes and substrates. Simulation results are shown to be compatible with experimental data. Based on these simulations, the rate-limiting steps in the chain can be determined, and K M and k cat of all four enzymes in Pyrosequencing can be calculated.
The integrated circuit (IC) industry has followed a steady path of shrinking device geometries fo... more The integrated circuit (IC) industry has followed a steady path of shrinking device geometries for more than 30 years. It is widely believed that this process will continue for at least another ten years. However, there are increasingly difficult materials and technology problems to be solved over the next decade if this is to actually occur and, beyond ten years, there is great uncertainty about the ability to continue scaling metal-oxide-semiconductor field-effect transistor (MOSFET) structures. This paper describes some of the most challenging materials and process issues to be faced in the future and, where possible solutions are known, describes these potential solutions. The paper is written with the underlying assumption that the basic metal-oxide-semiconductor (MOS) transistor will remain the dominant switching device used in ICs and it further assumes that silicon will remain the dominant substrate material. He is currently a Research Scientist at Stanford University. He has authored or coauthored more than 50 technical papers, coauthored a new textbook on Silicon VLSI Technology, and consults on advanced process technology with industry. His current research interests are aimed at developing atomistic insights into the fabrication process for silicon devices by a mix of experimental and computational methods.
The monolithic integration of germanium-on-insulator (GeOI) p-MOSFETs with silicon n-MOSFETs on a... more The monolithic integration of germanium-on-insulator (GeOI) p-MOSFETs with silicon n-MOSFETs on a silicon substrate is demonstrated. The GeOI p-MOSFETs are fabricated on the oxide for silicon device isolation based on the newly developed rapid-melt-growth method. CMOS inverters consisting of the silicon n-MOSFET and GeOI p-MOSFET were obtained, and the measured results show that the processing of high-performance GeOI devices is compatible with bulk-silicon technology.
First principles calculations aimed at quantifying the effects of zirconium and hafnium incorpora... more First principles calculations aimed at quantifying the effects of zirconium and hafnium incorporation at a model silicon/silicate interface have been performed. The tetrahedral bonding character of silicates allows useful comparisons as well as important new distinctions to be drawn with the familiar Si/SiO 2 system. The calculated energy cost of forming (Zr, Hf)-Si bonds suggests that SiO 2 -like bonding is energetically favored over silicide-like bonding at the Si interface. The calculations also suggest that the volume strain associated with Zr or Hf incorporation may lead to increased stress, both in the bulk oxide and in the interfacial transition region.
This paper presents a detailed study of the impact of lateral doping abruptness in the source/dra... more This paper presents a detailed study of the impact of lateral doping abruptness in the source/drain extension region and the gate-extension overlap length on device performance. Proper choice of the metric used to compare the different device designs is essential. Series resistance and threshold voltage roll-offs are shown to be incomplete measures of device performance that could lead to inconsistent lateral abruptness requirements. While series resistance is seen to improve with increasing junction abruptness, threshold voltage roll-off could be degraded by both lateral junctions that are too gradual and too abrupt - in contrast to the conventional scaling assumptions. The Ion (supernominal)-Ioff (subnominal) plot, which takes into account statistical variations of gate length, is proposed as a good metric for comparing different device technology designs. Gate-extension overlap length is shown to interact with lateral doping abruptness and to have a significant impact on device performance.
Junction formation using solid phase epitaxial (SPE) regrowth has been gaining popularity due to ... more Junction formation using solid phase epitaxial (SPE) regrowth has been gaining popularity due to its high activation and low thermal budget which results in lower diffusion. Recently, it was shown that by carrying out the SPE regrowth at 1050 C using a single Flash from a millisecond annealing tool it is possible to obtain active concentrations as high as 6 5 10 20 /cm 3 (Flash
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