[L5] Set the Vddio2 Independent I/Os supply

FRASTM · fpistm · commit 690d51b31dfa · 2021-01-30T17:27:20.000+01:00
This bit is mandatory to use PG[15:2]. Especially for LPUART1 TxRx pins.
This bit of the PWR CR2 is used to validate the VDDIO2 supply for
electrical and logical isolation purpose.

Signed-off-by: Francois Ramu &lt;francois.ramu@st.com&gt;
diff --git a/libraries/SrcWrapper/src/stm32/pinmap.c b/libraries/SrcWrapper/src/stm32/pinmap.c
@@ -98,6 +98,11 @@ void pin_function(PinName pin, int function)
   /* Enable GPIO clock */
   GPIO_TypeDef *gpio = set_GPIO_Port_Clock(port);
 
+#if defined (STM32L5xx)
+  /* Validate the VDDIO2 supply for electrical and logical isolation purpose. */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  HAL_PWREx_EnableVddIO2();
+#endif /* STM32L5xx */
 #if defined(STM32MP1xx)
   PERIPH_LOCK(gpio);
 #endif
