From eb3700af1a50a8fee9d26dbbf0ac594d63b68c2e Mon Sep 17 00:00:00 2001 From: foamyguy Date: Thu, 2 Jan 2025 15:37:05 -0600 Subject: [PATCH 1/3] longint workarounds --- adafruit_vl53l4cd.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/adafruit_vl53l4cd.py b/adafruit_vl53l4cd.py index c5dc24a..d651729 100644 --- a/adafruit_vl53l4cd.py +++ b/adafruit_vl53l4cd.py @@ -264,7 +264,7 @@ def timing_budget(self): """Ranging duration in milliseconds. Valid range is 10ms to 200ms.""" osc_freq = struct.unpack(">H", self._read_register(0x0006, 2))[0] - macro_period_us = 16 * (int(2304 * (0x40000000 / osc_freq)) >> 6) + macro_period_us = 16 * (int(2304 * (1073741824.0 / osc_freq)) >> 6) macrop_high = struct.unpack( ">H", self._read_register(_VL53L4CD_RANGE_CONFIG_A, 2) @@ -310,7 +310,7 @@ def timing_budget(self, val): raise RuntimeError("Osc frequency is 0.") timing_budget_us = val * 1000 - macro_period_us = int(2304 * (0x40000000 / osc_freq)) >> 6 + macro_period_us = int(2304 * (1073741824.0 / osc_freq)) >> 6 if inter_meas == 0: # continuous mode @@ -325,7 +325,7 @@ def timing_budget(self, val): timing_budget_us <<= 12 tmp = macro_period_us * 16 ls_byte = int(((timing_budget_us + ((tmp >> 6) >> 1)) / (tmp >> 6)) - 1) - while ls_byte & 0xFFFFFF00 > 0: + while ls_byte >> 8 & 0xFFFFFF > 0: ls_byte >>= 1 ms_byte += 1 ms_byte = (ms_byte << 8) + (ls_byte & 0xFF) @@ -335,7 +335,7 @@ def timing_budget(self, val): ms_byte = 0 tmp = macro_period_us * 12 ls_byte = int(((timing_budget_us + ((tmp >> 6) >> 1)) / (tmp >> 6)) - 1) - while ls_byte & 0xFFFFFF00 > 0: + while ls_byte >> 8 & 0xFFFFFF > 0: ls_byte >>= 1 ms_byte += 1 ms_byte = (ms_byte << 8) + (ls_byte & 0xFF) From b2451e6f4f532206a1cb6957541fd0b98280ac3c Mon Sep 17 00:00:00 2001 From: foamyguy Date: Tue, 7 Jan 2025 14:04:41 -0600 Subject: [PATCH 2/3] adding parens --- adafruit_vl53l4cd.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/adafruit_vl53l4cd.py b/adafruit_vl53l4cd.py index d651729..e7a1ebe 100644 --- a/adafruit_vl53l4cd.py +++ b/adafruit_vl53l4cd.py @@ -325,7 +325,7 @@ def timing_budget(self, val): timing_budget_us <<= 12 tmp = macro_period_us * 16 ls_byte = int(((timing_budget_us + ((tmp >> 6) >> 1)) / (tmp >> 6)) - 1) - while ls_byte >> 8 & 0xFFFFFF > 0: + while ls_byte >> (8 & 0xFFFFFF) > 0: ls_byte >>= 1 ms_byte += 1 ms_byte = (ms_byte << 8) + (ls_byte & 0xFF) @@ -335,7 +335,7 @@ def timing_budget(self, val): ms_byte = 0 tmp = macro_period_us * 12 ls_byte = int(((timing_budget_us + ((tmp >> 6) >> 1)) / (tmp >> 6)) - 1) - while ls_byte >> 8 & 0xFFFFFF > 0: + while ls_byte >> (8 & 0xFFFFFF) > 0: ls_byte >>= 1 ms_byte += 1 ms_byte = (ms_byte << 8) + (ls_byte & 0xFF) From 7074f7c55c19766fbe430de350206465f45c5ed0 Mon Sep 17 00:00:00 2001 From: foamyguy Date: Tue, 7 Jan 2025 16:53:33 -0600 Subject: [PATCH 3/3] move parens to the shift --- adafruit_vl53l4cd.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/adafruit_vl53l4cd.py b/adafruit_vl53l4cd.py index e7a1ebe..64b38d5 100644 --- a/adafruit_vl53l4cd.py +++ b/adafruit_vl53l4cd.py @@ -325,7 +325,7 @@ def timing_budget(self, val): timing_budget_us <<= 12 tmp = macro_period_us * 16 ls_byte = int(((timing_budget_us + ((tmp >> 6) >> 1)) / (tmp >> 6)) - 1) - while ls_byte >> (8 & 0xFFFFFF) > 0: + while (ls_byte >> 8) & 0xFFFFFF > 0: ls_byte >>= 1 ms_byte += 1 ms_byte = (ms_byte << 8) + (ls_byte & 0xFF) @@ -335,7 +335,7 @@ def timing_budget(self, val): ms_byte = 0 tmp = macro_period_us * 12 ls_byte = int(((timing_budget_us + ((tmp >> 6) >> 1)) / (tmp >> 6)) - 1) - while ls_byte >> (8 & 0xFFFFFF) > 0: + while (ls_byte >> 8) & 0xFFFFFF > 0: ls_byte >>= 1 ms_byte += 1 ms_byte = (ms_byte << 8) + (ls_byte & 0xFF)