Fix Risc-V code gen problem causing Python interpreter crash. #10301
+4
−1
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
|
Now working correctly with ESP-IDF 5.4.1. Tested on Adafruit Feather ESP32-C6 board. |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Fix for gcc compiler code gen problem when targeting Risc-V.
Makes
module_funcompiled function pointer inparse_compile_executevolatileto prevent RISC-V code gen from re-ordering store of the pointer into the stack frame. Generated code was scheduling store of the pointer after a call togc_collect, causing free of the compiled function object before execution the function. When the function was executed, it was overlayed while running, resulting in a crash in the interpreter.Resolves issue #10298.