diff --git a/boards.txt b/boards.txt
index ff52cb7e..1c7034c7 100644
--- a/boards.txt
+++ b/boards.txt
@@ -249,7 +249,7 @@ portentah7.menu.debug.true.postbuild_debug=-debug
 
 portentah7.build.zephyr_target=arduino_portenta_h7@1.0.0//m7
 portentah7.build.zephyr_args=
-portentah7.build.zephyr_hals=hal_stm32
+portentah7.build.zephyr_hals=hal_stm32 hal_infineon
 portentah7.build.variant=arduino_portenta_h7_stm32h747xx_m7
 portentah7.build.mcu=cortex-m7
 portentah7.build.fpu=-mfpu=fpv5-d16
@@ -487,7 +487,7 @@ opta.menu.debug.true.postbuild_debug=-debug
 
 opta.build.zephyr_target=arduino_opta//m7
 opta.build.zephyr_args=
-opta.build.zephyr_hals=hal_stm32
+opta.build.zephyr_hals=hal_stm32 hal_infineon
 opta.build.variant=arduino_opta_stm32h747xx_m7
 opta.build.mcu=cortex-m7
 opta.build.fpu=-mfpu=fpv5-d16
diff --git a/loader/fixups.c b/loader/fixups.c
index cf5e60cd..7b320deb 100644
--- a/loader/fixups.c
+++ b/loader/fixups.c
@@ -39,6 +39,17 @@ SYS_INIT(disable_bootloader_mpu, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAU
 SYS_INIT(disable_mpu_rasr_xn, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
 #endif
 
+#if defined(CONFIG_SOC_STM32H747XX_M7)
+int enable_bkp_access(void)
+{
+	/* Enable access to the backup domain */
+	// HAL_PWR_EnableBkUpAccess();
+	SET_BIT(PWR->CR1, PWR_CR1_DBP);
+	return 0;
+}
+SYS_INIT(enable_bkp_access, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
+#endif
+
 #if defined(CONFIG_BOARD_ARDUINO_GIGA_R1) && defined(CONFIG_VIDEO)
 #include <zephyr/kernel.h>
 #include <zephyr/device.h>
diff --git a/variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.conf b/variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.conf
index 8ad58579..f0e58cdd 100644
--- a/variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.conf
+++ b/variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.conf
@@ -64,3 +64,5 @@ CONFIG_CYW4343W_MURATA_1DX=y
 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048
 CONFIG_BT_RX_STACK_SIZE=4096
 CONFIG_BT_HCI_TX_STACK_SIZE=4096
+
+CONFIG_STM32H7_BOOT_M4_AT_INIT=n
diff --git a/variants/arduino_opta_stm32h747xx_m7/arduino_opta_stm32h747xx_m7.conf b/variants/arduino_opta_stm32h747xx_m7/arduino_opta_stm32h747xx_m7.conf
index 8aac2859..4019d77b 100644
--- a/variants/arduino_opta_stm32h747xx_m7/arduino_opta_stm32h747xx_m7.conf
+++ b/variants/arduino_opta_stm32h747xx_m7/arduino_opta_stm32h747xx_m7.conf
@@ -90,3 +90,20 @@ CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=7168
 CONFIG_MBEDTLS_HASH_ALL_ENABLED=y
 CONFIG_MBEDTLS_CMAC=y
 
+CONFIG_BT=y
+CONFIG_BT_HCI_RAW=y
+CONFIG_BT_HCI_RAW_H4=y
+CONFIG_BT_HCI_RAW_H4_ENABLE=y
+CONFIG_BT_BUF_ACL_RX_SIZE=255
+CONFIG_BT_BUF_CMD_TX_SIZE=255
+CONFIG_BT_BUF_EVT_DISCARDABLE_SIZE=255
+CONFIG_BT_MAX_CONN=4
+CONFIG_BT_CTLR_ADV_EXT=y
+CONFIG_BT_CTLR_ADV_PERIODIC=y
+CONFIG_BT_CTLR_DTM_HCI=y
+CONFIG_CYW4343W_MURATA_1DX=y
+CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048
+CONFIG_BT_RX_STACK_SIZE=4096
+CONFIG_BT_HCI_TX_STACK_SIZE=4096
+
+CONFIG_STM32H7_BOOT_M4_AT_INIT=n
diff --git a/variants/arduino_opta_stm32h747xx_m7/arduino_opta_stm32h747xx_m7.overlay b/variants/arduino_opta_stm32h747xx_m7/arduino_opta_stm32h747xx_m7.overlay
index 4e11c75c..315a56a6 100644
--- a/variants/arduino_opta_stm32h747xx_m7/arduino_opta_stm32h747xx_m7.overlay
+++ b/variants/arduino_opta_stm32h747xx_m7/arduino_opta_stm32h747xx_m7.overlay
@@ -23,7 +23,7 @@
 
 &i2c1 {
 	status = "okay";
-	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
+	pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
 	pinctrl-names = "default";
 	clock-frequency = <I2C_BITRATE_FAST>;
 };
diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf b/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf
index d8242394..c5b70a01 100644
--- a/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf
+++ b/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf
@@ -95,4 +95,22 @@ CONFIG_VIDEO_BUFFER_POOL_ALIGN=32
 CONFIG_VIDEO_BUFFER_USE_SHARED_MULTI_HEAP=y
 CONFIG_VIDEO_BUFFER_SMH_ATTRIBUTE=2
 CONFIG_FLASH=y
-CONFIG_STM32H7_BOOT_M4_AT_INIT=n 
+
+
+CONFIG_BT=y
+CONFIG_BT_HCI_RAW=y
+CONFIG_BT_HCI_RAW_H4=y
+CONFIG_BT_HCI_RAW_H4_ENABLE=y
+CONFIG_BT_BUF_ACL_RX_SIZE=255
+CONFIG_BT_BUF_CMD_TX_SIZE=255
+CONFIG_BT_BUF_EVT_DISCARDABLE_SIZE=255
+CONFIG_BT_MAX_CONN=4
+CONFIG_BT_CTLR_ADV_EXT=y
+CONFIG_BT_CTLR_ADV_PERIODIC=y
+CONFIG_BT_CTLR_DTM_HCI=y
+CONFIG_CYW4343W_MURATA_1DX=y
+CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048
+CONFIG_BT_RX_STACK_SIZE=4096
+CONFIG_BT_HCI_TX_STACK_SIZE=4096
+
+CONFIG_STM32H7_BOOT_M4_AT_INIT=n