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Minimal interrupt (#7)
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‎.github/workflows/rust_all.yml

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cargo make ci_debug
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cargo make ci_release
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cargo doc
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- name: Minimal Interrupt
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working-directory: ${{github.workspace}}/minimal_interrupt
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run: |
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cargo make ci_debug
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cargo make ci_release
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cargo doc

‎README.md

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- Minimal buildsystem
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- Initial [cargo-make](https://github.com/sagiegurari/cargo-make) framework to have configurable build options i.e extending `cargo`
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- Minimal controller peripheral
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- Use bindgen to transform `.c` architecture and chip files to `.rs`
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- Create `l0` and `l5` workspace layers
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- Add **architecture**, **controller** and **startup** files in `l0`
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- Minimal Drivers
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- Write GPIO and USART drivers for high level application usage
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- Added `l2`, `l3` and `l4` workspace layers
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- Added **bitflags** utility library in `l2` via crates.io
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- Added **driver interfaces**, **gpio**, **usart** drivers in `l3`
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- Added **led** and **button** modules in `l4`
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- Minimal Interrupt
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- Configure interrupts from high level application code
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- Updated `l0` `l2`, `l3` and `l4` workspace layers
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- Updated `l0` with user interrupt considerations
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- Added **heapless** library to `l2`
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- Added USART buffered traits to `l3`
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# Roadmap
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## Libraries
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- [Bitflags](https://crates.io/crates/bitflags): Rust macros to generate bitflags
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- [Heapless](https://crates.io/crates/heapless): Stack allocated data structures
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## RTOS
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## Debugging

‎minimal_drivers/l5/src/main.rs

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gpiob_peripheral.configure_for_usart(GPIOAlternate::AF7, 6);
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gpiob_peripheral.configure_for_usart(GPIOAlternate::AF7, 7);
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let usart1_rx_tx: &mut dyn UsartInOut = &mut USART1_PORT.take().configure_default_rx_tx();
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let mut usart1_rx_tx = USART1_PORT.take().configure_default_rx_tx();
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let gpioc_peripheral = GPIOC_PORT.take();
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// Configure GPIOC port and Pin 13 as input

‎minimal_interrupt/.cargo/config.toml

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[target.thumbv7em-none-eabihf]
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# uncomment this to make `cargo run` execute programs on QEMU
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# runner = "qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel"
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# uncomment ONE of these three option to make `cargo run` start a GDB session
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# which option to pick depends on your system
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# runner = "arm-none-eabi-gdb -q -x openocd.gdb"
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# runner = "gdb-multiarch -q -x openocd.gdb"
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# runner = "gdb -q -x openocd.gdb"
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rustflags = [
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# This is needed if your flash or ram addresses are not aligned to 0x10000 in memory.x
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# See https://github.com/rust-embedded/cortex-m-quickstart/pull/95
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# "-C", "link-arg=--nmagic",
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# LLD (shipped with the Rust toolchain) is used as the default linker
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# "-C", "link-arg=-Tgcc_arm.ld",
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# Generate a .map file
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# "-C", "link-args=-Map=application.map",
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# if you run into problems with LLD switch to the GNU linker by commenting out
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# this line
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"-C", "linker=arm-none-eabi-ld",
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# if you need to link to pre-compiled C libraries provided by a C toolchain
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# use GCC as the linker by commenting out both lines above and then
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# uncommenting the three lines below
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"-C", "linker=arm-none-eabi-gcc",
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"-C", "link-arg=-Wl,-Tgcc_arm.ld",
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"-C", "link-arg=-Wl,-Map,application.map",
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"-C", "link-arg=-nostartfiles",
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]
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[build]
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# Pick ONE of these compilation targets
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# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+
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# target = "thumbv7m-none-eabi" # Cortex-M3
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# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU)
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target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
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# target = "thumbv8m.base-none-eabi" # Cortex-M23
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# target = "thumbv8m.main-none-eabi" # Cortex-M33 (no FPU)
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# target = "thumbv8m.main-none-eabihf" # Cortex-M33 (with FPU)

‎minimal_interrupt/.gitignore

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# Files
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*.map
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.vscode/.cortex-debug.*
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# Folders
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target

‎minimal_interrupt/.vscode/launch.json

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{
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"configurations": [
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{
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"cwd": "${workspaceFolder}",
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"executable": "target/thumbv7em-none-eabihf/debug/application",
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"configFiles": [
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"stm32l4discovery.cfg"
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],
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"postLaunchCommands": [
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"load",
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"monitor arm semihosting enable",
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],
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"name": "Rust Debug",
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"request": "launch",
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"type": "cortex-debug",
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"servertype": "openocd",
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"svdFile": "l0/svd/STM32L4x5.svd",
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"svdPath": "l0/svd/STM32L4x5.svd"
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},
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{
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"cwd": "${workspaceFolder}",
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"executable": "target/thumbv7em-none-eabihf/release/application",
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"configFiles": [
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"stm32l4discovery.cfg"
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],
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"postLaunchCommands": [
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"load",
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"monitor arm semihosting enable",
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],
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"name": "Rust Release",
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"request": "launch",
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"type": "cortex-debug",
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"servertype": "openocd"
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}
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]
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}

‎minimal_interrupt/.vscode/settings.json

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{
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"rust-analyzer.cargo.target": "thumbv7em-none-eabihf",
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"rust-analyzer.check.allTargets": false,
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"rust-analyzer.imports.prefer.no.std": true,
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"rust-analyzer.cargo.unsetTest": [
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"core",
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"l0",
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"l3",
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"l5",
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"application",
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],
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}

‎minimal_interrupt/Cargo.toml

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[workspace]
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members = [
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"l0",
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"l3",
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"l4",
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"l5"
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]

‎minimal_interrupt/Makefile.toml

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[config]
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default_to_workspace = false
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# Duckscript is used here to convert \ to / for binary output path
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[tasks.build_debug]
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script_runner = "@duckscript"
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script = '''
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output = set ${CARGO_MAKE_CRATE_CUSTOM_TRIPLE_TARGET_DIRECTORY}/debug/application
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echo OUTPUT: ${output}
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output = replace ${output} \\ /
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set_env OUTPUT ${output}
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exec cargo build
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'''
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# Duckscript is used here to convert \ to / for binary output path
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[tasks.build_release]
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script_runner = "@duckscript"
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script = '''
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output = set ${CARGO_MAKE_CRATE_CUSTOM_TRIPLE_TARGET_DIRECTORY}/release/application
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output = replace ${output} \\ /
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set_env OUTPUT ${output}
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exec cargo build --release
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'''
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[tasks.test]
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command = "cargo"
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args = ["test", "--target", "${CARGO_MAKE_RUST_TARGET_TRIPLE}"]
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[tasks.flash_debug]
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script_runner = "@shell"
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script = '''
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openocd -f board/stm32l4discovery.cfg -c "program ${OUTPUT} verify reset exit"
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'''
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dependencies = ["build_debug"]
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[tasks.ci_debug]
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dependencies = [
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"build_debug",
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"test",
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"objcopy_to_binary",
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"objcopy_to_hex",
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"objdump",
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"size",
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]
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[tasks.ci_release]
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dependencies = [
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"build_release",
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"test",
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"objcopy_to_binary",
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"objcopy_to_hex",
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"objdump",
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"size",
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]
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# Private Tasks
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# Requires
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# arm-none-eabi-size executable (ARM GCC toolchain)
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# OUTPUT env variable (Set by build_*)
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[tasks.size]
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private = true
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command = "arm-none-eabi-size"
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args = ["${OUTPUT}"]
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# arm-none-eabi-objcopy executable (ARM GCC toolchain)
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# OUTPUT env variable (Set by build_*)
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[tasks.objcopy_to_binary]
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private = true
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command = "arm-none-eabi-objcopy"
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args = ["-O", "binary", "${OUTPUT}", "${OUTPUT}.bin"]
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# arm-none-eabi-objcopy executable (ARM GCC toolchain)
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# OUTPUT env variable (Set by build_*)
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[tasks.objcopy_to_hex]
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private = true
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command = "arm-none-eabi-objcopy"
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args = ["-O", "ihex", "${OUTPUT}", "${OUTPUT}.hex"]
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# arm-none-eabi-objdump executable (ARM GCC toolchain)
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# OUTPUT env variable (Set by build_*)
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[tasks.objdump]
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private = true
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script_runner = "@shell"
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script = '''
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arm-none-eabi-objdump --source --all-headers --demangle --line-numbers --wide ${OUTPUT} > ${OUTPUT}.lst
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'''

‎minimal_interrupt/README.md

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- [Minimal Interrupt](#minimal-interrupt)
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- [Links](#links)
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- [Microcontrollers layers](#microcontrollers-layers)
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- [Pre-requisites](#pre-requisites)
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- [Changelog](#changelog)
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- [L0 - Entry](#l0---entry)
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- [L0 - Utility](#l0---utility)
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- [L0 - Chip](#l0---chip)
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- [L0 - Architecture](#l0---architecture)
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- [L2 - Utility](#l2---utility)
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- [L3 Improvements](#l3-improvements)
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- [Hardware](#hardware)
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- [Software](#software)
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- [L3 - Interface](#l3---interface)
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- [L3 - Driver](#l3---driver)
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- [L5 - Application](#l5---application)
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# Minimal Interrupt
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This code has been tested on
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- B-L475-IOT01A board (STM32L475VGT6 ARM Cortex M4 CPU with FPU)
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## Links
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- [Cargo binutils](https://github.com/rust-embedded/cargo-binutils)
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- [Embedded Rust book](https://doc.rust-lang.org/stable/embedded-book/)
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- [Lowlevel Embedded Rust book](https://docs.rust-embedded.org/embedonomicon/)
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## Microcontrollers layers
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- L0 Lowlevel
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- Chip Interrupts
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- L1 RTOS
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- L2 Utility
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- Heapless library
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- L3 Driver
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- Interrupt support for GPIO and USART
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- L4 Sensor
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- L5 Application
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- Interrupt usage
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---
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## Pre-requisites
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- Pre-requisites from `minimal_driver`
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# Changelog
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## L0 - Entry
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- Updated linker script to remove PROVIDE attributes
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- Updated entry point with a better EXCEPTIONS usage
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## L0 - Utility
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- Added `write_assign_register` macro
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## L0 - Chip
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- Updated `controller_init` with `SCB->VTOR = FLASH_BASE`
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- Added `attach_interrupt_handler` for STM32L475xx chip
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## L0 - Architecture
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- Added `nvic` module with `enable_irq` function
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- NOTE, This has only been added since bindgen cannot parse `static inline` C functions
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## L2 - Utility
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- Added [heapless](https://crates.io/crates/heapless) library for stack based datastructures
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## L3 Improvements
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### Hardware
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```mermaid
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graph BT;
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subgraph Port
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USART1-3
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subgraph Peripheral
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USART
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subgraph Register
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CR1
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CR2
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RDR
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TDR
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end
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end
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end
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```
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### Software
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```mermaid
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graph BT;
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subgraph Port
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USART1-3
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subgraph Peripheral
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PolledUSART
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BufferedUSART
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end
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end
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```
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## L3 - Interface
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- Removed `PeripheralConfiguration` trait
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- Added `UsartBufferedIn` and `UsartBufferedInOut` trait
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## L3 - Driver
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- Added `USARTBufferedFunction` functionality
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- Renamed to `USARTPolledFunction`
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- Renamed to `GPIOFunction`
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## L5 - Application
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- Updated example with GPIO Input using interrupt and Atomics
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- Updated example with USART Buffered RX and TX using interrupts and static stack allocated lock free queues

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