|
1 | | -use crate::{read_register, SCB_PORT}; |
2 | | - |
3 | 1 | #[derive(Copy, Clone)] |
4 | 2 | pub enum Interrupt { |
5 | 3 | WWDG, |
@@ -86,25 +84,174 @@ pub enum Interrupt { |
86 | 84 | FPU, |
87 | 85 | } |
88 | 86 |
|
89 | | -static mut MY_INTERRUPTS: [fn(); 82] = [|| loop {}; 82]; |
90 | | -pub fn attach_interrupt_handler(interrupt: Interrupt, handler: fn()) { |
91 | | - let index: usize = interrupt as usize; |
92 | | - unsafe { |
93 | | - MY_INTERRUPTS[index] = handler; |
94 | | - } |
| 87 | +extern "C" { |
| 88 | + fn WWDG_Interrupt_Handler(); |
| 89 | + fn PVD_PVM_Interrupt_Handler(); |
| 90 | + fn RTC_TAMP_STAMP_Interrupt_Handler(); |
| 91 | + fn RTC_WKUP_Interrupt_Handler(); |
| 92 | + fn FLASH_Interrupt_Handler(); |
| 93 | + fn RCC_Interrupt_Handler(); |
| 94 | + fn EXTI0_Interrupt_Handler(); |
| 95 | + fn EXTI1_Interrupt_Handler(); |
| 96 | + fn EXTI2_Interrupt_Handler(); |
| 97 | + fn EXTI3_Interrupt_Handler(); |
| 98 | + fn EXTI4_Interrupt_Handler(); |
| 99 | + fn DMA1_CH1_Interrupt_Handler(); |
| 100 | + fn DMA1_CH2_Interrupt_Handler(); |
| 101 | + fn DMA1_CH3_Interrupt_Handler(); |
| 102 | + fn DMA1_CH4_Interrupt_Handler(); |
| 103 | + fn DMA1_CH5_Interrupt_Handler(); |
| 104 | + fn DMA1_CH6_Interrupt_Handler(); |
| 105 | + fn DMA1_CH7_Interrupt_Handler(); |
| 106 | + fn ADC1_2_Interrupt_Handler(); |
| 107 | + fn CAN1_TX_Interrupt_Handler(); |
| 108 | + fn CAN1_RX0_Interrupt_Handler(); |
| 109 | + fn CAN1_RX1_Interrupt_Handler(); |
| 110 | + fn CAN1_SCE_Interrupt_Handler(); |
| 111 | + fn EXTI9_5_Interrupt_Handler(); |
| 112 | + fn TIM1_BRK_Interrupt_Handler(); |
| 113 | + fn TIM1_UP_Interrupt_Handler(); |
| 114 | + fn TIM1_TRG_COM_Interrupt_Handler(); |
| 115 | + fn TIM1_CC_Interrupt_Handler(); |
| 116 | + fn TIM2_Interrupt_Handler(); |
| 117 | + fn TIM3_Interrupt_Handler(); |
| 118 | + fn TIM4_Interrupt_Handler(); |
| 119 | + fn I2C1_EV_Interrupt_Handler(); |
| 120 | + fn I2C1_ER_Interrupt_Handler(); |
| 121 | + fn I2C2_EV_Interrupt_Handler(); |
| 122 | + fn I2C2_ER_Interrupt_Handler(); |
| 123 | + fn SPI1_Interrupt_Handler(); |
| 124 | + fn SPI2_Interrupt_Handler(); |
| 125 | + fn USART1_Interrupt_Handler(); |
| 126 | + fn USART2_Interrupt_Handler(); |
| 127 | + fn USART3_Interrupt_Handler(); |
| 128 | + fn EXTI15_10_Interrupt_Handler(); |
| 129 | + fn RTC_ALARM_Interrupt_Handler(); |
| 130 | + fn DFSDM1_FLT3_Interrupt_Handler(); |
| 131 | + fn TIM8_BRK_Interrupt_Handler(); |
| 132 | + fn TIM8_UP_Interrupt_Handler(); |
| 133 | + fn TIM8_TRG_COM_Interrupt_Handler(); |
| 134 | + fn TIM8_CC_Interrupt_Handler(); |
| 135 | + fn ADC3_Interrupt_Handler(); |
| 136 | + fn FMC_Interrupt_Handler(); |
| 137 | + fn SDMMC1_Interrupt_Handler(); |
| 138 | + fn TIM5_Interrupt_Handler(); |
| 139 | + fn SPI3_Interrupt_Handler(); |
| 140 | + fn UART4_Interrupt_Handler(); |
| 141 | + fn UART5_Interrupt_Handler(); |
| 142 | + fn TIM6_DAC_Interrupt_Handler(); |
| 143 | + fn TIM7_Interrupt_Handler(); |
| 144 | + fn DMA2_CH1_Interrupt_Handler(); |
| 145 | + fn DMA2_CH2_Interrupt_Handler(); |
| 146 | + fn DMA2_CH3_Interrupt_Handler(); |
| 147 | + fn DMA2_CH4_Interrupt_Handler(); |
| 148 | + fn DMA2_CH5_Interrupt_Handler(); |
| 149 | + fn DFSDM1_FLT0_Interrupt_Handler(); |
| 150 | + fn DFSDM1_FLT1_Interrupt_Handler(); |
| 151 | + fn DFSDM1_FLT2_Interrupt_Handler(); |
| 152 | + fn COMP_Interrupt_Handler(); |
| 153 | + fn LPTIM1_Interrupt_Handler(); |
| 154 | + fn LPTIM2_Interrupt_Handler(); |
| 155 | + fn OTG_FS_Interrupt_Handler(); |
| 156 | + fn DMA2_CH6_Interrupt_Handler(); |
| 157 | + fn DMA2_CH7_Interrupt_Handler(); |
| 158 | + fn LPUART1_Interrupt_Handler(); |
| 159 | + fn QUADSPI_Interrupt_Handler(); |
| 160 | + fn I2C3_EV_Interrupt_Handler(); |
| 161 | + fn I2C3_ER_Interrupt_Handler(); |
| 162 | + fn SAI1_Interrupt_Handler(); |
| 163 | + fn SAI2_Interrupt_Handler(); |
| 164 | + fn SWPMI1_Interrupt_Handler(); |
| 165 | + fn TSC_Interrupt_Handler(); |
| 166 | + fn LCD_Interrupt_Handler(); |
| 167 | + fn AES_Interrupt_Handler(); |
| 168 | + fn RNG_Interrupt_Handler(); |
| 169 | + fn FPU_Interrupt_Handler(); |
95 | 170 | } |
96 | 171 |
|
97 | 172 | #[link_section = ".vector_table.interrupts"] |
98 | 173 | #[no_mangle] |
99 | | -static INTERRUPTS: [unsafe extern "C" fn(); 82] = [DefaultInterruptHandler; 82]; |
100 | | - |
101 | | -#[no_mangle] |
102 | | -extern "C" fn DefaultInterruptHandler() { |
103 | | - let scb_port = SCB_PORT::port(); |
104 | | - let irq_num = (read_register!(scb_port.ICSR) & 0xFF) - 16; |
105 | | - unsafe { |
106 | | - MY_INTERRUPTS |
107 | | - .get(irq_num as usize) |
108 | | - .expect("No interrupt registered")(); |
109 | | - } |
110 | | -} |
| 174 | +static INTERRUPTS: [unsafe extern "C" fn(); 82] = [ |
| 175 | + WWDG_Interrupt_Handler, |
| 176 | + PVD_PVM_Interrupt_Handler, |
| 177 | + RTC_TAMP_STAMP_Interrupt_Handler, |
| 178 | + RTC_WKUP_Interrupt_Handler, |
| 179 | + FLASH_Interrupt_Handler, |
| 180 | + RCC_Interrupt_Handler, |
| 181 | + EXTI0_Interrupt_Handler, |
| 182 | + EXTI1_Interrupt_Handler, |
| 183 | + EXTI2_Interrupt_Handler, |
| 184 | + EXTI3_Interrupt_Handler, |
| 185 | + EXTI4_Interrupt_Handler, |
| 186 | + DMA1_CH1_Interrupt_Handler, |
| 187 | + DMA1_CH2_Interrupt_Handler, |
| 188 | + DMA1_CH3_Interrupt_Handler, |
| 189 | + DMA1_CH4_Interrupt_Handler, |
| 190 | + DMA1_CH5_Interrupt_Handler, |
| 191 | + DMA1_CH6_Interrupt_Handler, |
| 192 | + DMA1_CH7_Interrupt_Handler, |
| 193 | + ADC1_2_Interrupt_Handler, |
| 194 | + CAN1_TX_Interrupt_Handler, |
| 195 | + CAN1_RX0_Interrupt_Handler, |
| 196 | + CAN1_RX1_Interrupt_Handler, |
| 197 | + CAN1_SCE_Interrupt_Handler, |
| 198 | + EXTI9_5_Interrupt_Handler, |
| 199 | + TIM1_BRK_Interrupt_Handler, |
| 200 | + TIM1_UP_Interrupt_Handler, |
| 201 | + TIM1_TRG_COM_Interrupt_Handler, |
| 202 | + TIM1_CC_Interrupt_Handler, |
| 203 | + TIM2_Interrupt_Handler, |
| 204 | + TIM3_Interrupt_Handler, |
| 205 | + TIM4_Interrupt_Handler, |
| 206 | + I2C1_EV_Interrupt_Handler, |
| 207 | + I2C1_ER_Interrupt_Handler, |
| 208 | + I2C2_EV_Interrupt_Handler, |
| 209 | + I2C2_ER_Interrupt_Handler, |
| 210 | + SPI1_Interrupt_Handler, |
| 211 | + SPI2_Interrupt_Handler, |
| 212 | + USART1_Interrupt_Handler, |
| 213 | + USART2_Interrupt_Handler, |
| 214 | + USART3_Interrupt_Handler, |
| 215 | + EXTI15_10_Interrupt_Handler, |
| 216 | + RTC_ALARM_Interrupt_Handler, |
| 217 | + DFSDM1_FLT3_Interrupt_Handler, |
| 218 | + TIM8_BRK_Interrupt_Handler, |
| 219 | + TIM8_UP_Interrupt_Handler, |
| 220 | + TIM8_TRG_COM_Interrupt_Handler, |
| 221 | + TIM8_CC_Interrupt_Handler, |
| 222 | + ADC3_Interrupt_Handler, |
| 223 | + FMC_Interrupt_Handler, |
| 224 | + SDMMC1_Interrupt_Handler, |
| 225 | + TIM5_Interrupt_Handler, |
| 226 | + SPI3_Interrupt_Handler, |
| 227 | + UART4_Interrupt_Handler, |
| 228 | + UART5_Interrupt_Handler, |
| 229 | + TIM6_DAC_Interrupt_Handler, |
| 230 | + TIM7_Interrupt_Handler, |
| 231 | + DMA2_CH1_Interrupt_Handler, |
| 232 | + DMA2_CH2_Interrupt_Handler, |
| 233 | + DMA2_CH3_Interrupt_Handler, |
| 234 | + DMA2_CH4_Interrupt_Handler, |
| 235 | + DMA2_CH5_Interrupt_Handler, |
| 236 | + DFSDM1_FLT0_Interrupt_Handler, |
| 237 | + DFSDM1_FLT1_Interrupt_Handler, |
| 238 | + DFSDM1_FLT2_Interrupt_Handler, |
| 239 | + COMP_Interrupt_Handler, |
| 240 | + LPTIM1_Interrupt_Handler, |
| 241 | + LPTIM2_Interrupt_Handler, |
| 242 | + OTG_FS_Interrupt_Handler, |
| 243 | + DMA2_CH6_Interrupt_Handler, |
| 244 | + DMA2_CH7_Interrupt_Handler, |
| 245 | + LPUART1_Interrupt_Handler, |
| 246 | + QUADSPI_Interrupt_Handler, |
| 247 | + I2C3_EV_Interrupt_Handler, |
| 248 | + I2C3_ER_Interrupt_Handler, |
| 249 | + SAI1_Interrupt_Handler, |
| 250 | + SAI2_Interrupt_Handler, |
| 251 | + SWPMI1_Interrupt_Handler, |
| 252 | + TSC_Interrupt_Handler, |
| 253 | + LCD_Interrupt_Handler, |
| 254 | + AES_Interrupt_Handler, |
| 255 | + RNG_Interrupt_Handler, |
| 256 | + FPU_Interrupt_Handler, |
| 257 | +]; |
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