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| 1 | +Qualcomm Ethernet ETHQOS device |
| 2 | + |
| 3 | +This documents dwmmac based ethernet device which supports Gigabit |
| 4 | +ethernet for version v2.3.0 onwards. |
| 5 | + |
| 6 | +This device has following properties: |
| 7 | + |
| 8 | +Required properties: |
| 9 | + |
| 10 | +- compatible: Should be qcom,qcs404-ethqos" |
| 11 | + |
| 12 | +- reg: Address and length of the register set for the device |
| 13 | + |
| 14 | +- reg-names: Should contain register names "stmmaceth", "rgmii" |
| 15 | + |
| 16 | +- clocks: Should contain phandle to clocks |
| 17 | + |
| 18 | +- clock-names: Should contain clock names "stmmaceth", "pclk", |
| 19 | + "ptp_ref", "rgmii" |
| 20 | + |
| 21 | +- interrupts: Should contain phandle to interrupts |
| 22 | + |
| 23 | +- interrupt-names: Should contain interrupt names "macirq", "eth_lpi" |
| 24 | + |
| 25 | +Rest of the properties are defined in stmmac.txt file in same directory |
| 26 | + |
| 27 | + |
| 28 | +Example: |
| 29 | + |
| 30 | +ethernet: ethernet@7a80000 { |
| 31 | + compatible = "qcom,qcs404-ethqos"; |
| 32 | + reg = <0x07a80000 0x10000>, |
| 33 | + <0x07a96000 0x100>; |
| 34 | + reg-names = "stmmaceth", "rgmii"; |
| 35 | + clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; |
| 36 | + clocks = <&gcc GCC_ETH_AXI_CLK>, |
| 37 | + <&gcc GCC_ETH_SLAVE_AHB_CLK>, |
| 38 | + <&gcc GCC_ETH_PTP_CLK>, |
| 39 | + <&gcc GCC_ETH_RGMII_CLK>; |
| 40 | + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, |
| 41 | + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
| 42 | + interrupt-names = "macirq", "eth_lpi"; |
| 43 | + snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; |
| 44 | + snps,reset-active-low; |
| 45 | + |
| 46 | + snps,txpbl = <8>; |
| 47 | + snps,rxpbl = <2>; |
| 48 | + snps,aal; |
| 49 | + snps,tso; |
| 50 | + |
| 51 | + phy-handle = <&phy1>; |
| 52 | + phy-mode = "rgmii"; |
| 53 | + |
| 54 | + mdio { |
| 55 | + #address-cells = <0x1>; |
| 56 | + #size-cells = <0x0>; |
| 57 | + compatible = "snps,dwmac-mdio"; |
| 58 | + phy1: phy@4 { |
| 59 | + device_type = "ethernet-phy"; |
| 60 | + reg = <0x4>; |
| 61 | + }; |
| 62 | + }; |
| 63 | + |
| 64 | +}; |
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