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Merge back thermal control material for v6.1.
2 parents d92e600 + 393d0f5 commit 02af1db

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‎Documentation/atomic_bitops.txt

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@@ -59,7 +59,7 @@ Like with atomic_t, the rule of thumb is:
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- RMW operations that have a return value are fully ordered.
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- RMW operations that are conditional are unordered on FAILURE,
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otherwise the above rules apply. In the case of test_and_{}_bit() operations,
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otherwise the above rules apply. In the case of test_and_set_bit_lock(),
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if the bit in memory is unchanged by the operation then it is deemed to have
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failed.
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‎Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml

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@@ -233,6 +233,7 @@ allOf:
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- allwinner,sun8i-a83t-tcon-lcd
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- allwinner,sun8i-v3s-tcon
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- allwinner,sun9i-a80-tcon-lcd
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- allwinner,sun20i-d1-tcon-lcd
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then:
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properties:
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- allwinner,sun8i-a83t-tcon-tv
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- allwinner,sun8i-r40-tcon-tv
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- allwinner,sun9i-a80-tcon-tv
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- allwinner,sun20i-d1-tcon-tv
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then:
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properties:
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- allwinner,sun9i-a80-tcon-lcd
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- allwinner,sun4i-a10-tcon
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- allwinner,sun8i-a83t-tcon-lcd
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- allwinner,sun20i-d1-tcon-lcd
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then:
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required:
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- allwinner,sun8i-a23-tcon
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- allwinner,sun8i-a33-tcon
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- allwinner,sun8i-a83t-tcon-lcd
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- allwinner,sun20i-d1-tcon-lcd
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then:
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properties:

‎Documentation/devicetree/bindings/net/qcom-emac.txt

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@@ -14,7 +14,7 @@ MAC node:
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- mac-address : The 6-byte MAC address. If present, it is the default
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MAC address.
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- internal-phy : phandle to the internal PHY node
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- phy-handle : phandle the external PHY node
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- phy-handle : phandle to the external PHY node
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Internal PHY node:
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- compatible : Should be "qcom,fsm9900-emac-sgmii" or "qcom,qdf2432-emac-sgmii".

‎Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml

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description:
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Properties for single LDO regulator.
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properties:
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regulator-name:
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pattern: "^LDO[1-5]$"
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description:
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should be "LDO1", ..., "LDO5"
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unevaluatedProperties: false
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"^BUCK[1-6]$":
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Properties for single BUCK regulator.
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properties:
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regulator-name:
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pattern: "^BUCK[1-6]$"
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description:
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should be "BUCK1", ..., "BUCK6"
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nxp,dvs-run-voltage:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 600000

‎Documentation/devicetree/bindings/spi/cdns,qspi-nor-peripheral-props.yaml

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See spi-peripheral-props.yaml for more info.
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maintainers:
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- Pratyush Yadav <p.yadav@ti.com>
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- Vaishnav Achath <vaishnav.a@ti.com>
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properties:
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# cdns,qspi-nor.yaml

‎Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml

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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence Quad SPI controller
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maintainers:
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- Pratyush Yadav <p.yadav@ti.com>
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- Vaishnav Achath <vaishnav.a@ti.com>
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allOf:
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- $ref: spi-controller.yaml#

‎Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml

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their own separate schema that should be referenced from here.
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maintainers:
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- Pratyush Yadav <p.yadav@ti.com>
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- Mark Brown <broonie@kernel.org>
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properties:
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reg:

‎Documentation/devicetree/bindings/thermal/rcar-thermal.yaml

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description:
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Address ranges of the thermal registers. If more then one range is given
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the first one must be the common registers followed by each sensor
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according the datasheet.
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according to the datasheet.
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minItems: 1
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maxItems: 4
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‎Documentation/kbuild/kconfig-language.rst

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If you need to expose a compiler capability to makefiles and/or C source files,
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`CC_HAS_` is the recommended prefix for the config option::
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config CC_HAS_ASM_GOTO
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def_bool $(success,$(srctree)/scripts/gcc-goto.sh $(CC))
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config CC_HAS_FOO
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def_bool $(success,$(srctree)/scripts/cc-check-foo.sh $(CC))
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Build as module only
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~~~~~~~~~~~~~~~~~~~~

‎Documentation/tools/rtla/rtla-timerlat-hist.rst

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=======
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In the example below, **rtla timerlat hist** is set to run for *10* minutes,
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in the cpus *0-4*, *skipping zero* only lines. Moreover, **rtla timerlat
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hist** will change the priority of the *timelat* threads to run under
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hist** will change the priority of the *timerlat* threads to run under
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*SCHED_DEADLINE* priority, with a *10us* runtime every *1ms* period. The
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*1ms* period is also passed to the *timerlat* tracer::
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