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lunn
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phy: phy_{read|write}_mmd_indirect: get addr from phydev
The address of the device can be determined from the phydev structure, rather than passing it as a parameter. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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5 files changed

+25
-37
lines changed

5 files changed

+25
-37
lines changed

‎drivers/net/phy/bcm-phy-lib.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -184,25 +184,25 @@ int bcm_phy_enable_eee(struct phy_device *phydev)
184184

185185
/* Enable EEE at PHY level */
186186
val = phy_read_mmd_indirect(phydev, BRCM_CL45VEN_EEE_CONTROL,
187-
MDIO_MMD_AN, phydev->addr);
187+
MDIO_MMD_AN);
188188
if (val < 0)
189189
return val;
190190

191191
val |= LPI_FEATURE_EN | LPI_FEATURE_EN_DIG1000X;
192192

193193
phy_write_mmd_indirect(phydev, BRCM_CL45VEN_EEE_CONTROL,
194-
MDIO_MMD_AN, phydev->addr, (u32)val);
194+
MDIO_MMD_AN, (u32)val);
195195

196196
/* Advertise EEE */
197197
val = phy_read_mmd_indirect(phydev, BCM_CL45VEN_EEE_ADV,
198-
MDIO_MMD_AN, phydev->addr);
198+
MDIO_MMD_AN);
199199
if (val < 0)
200200
return val;
201201

202202
val |= (MDIO_AN_EEE_ADV_100TX | MDIO_AN_EEE_ADV_1000T);
203203

204204
phy_write_mmd_indirect(phydev, BCM_CL45VEN_EEE_ADV,
205-
MDIO_MMD_AN, phydev->addr, (u32)val);
205+
MDIO_MMD_AN, (u32)val);
206206

207207
return 0;
208208
}

‎drivers/net/phy/dp83867.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -160,7 +160,7 @@ static int dp83867_config_init(struct phy_device *phydev)
160160
if ((phydev->interface >= PHY_INTERFACE_MODE_RGMII_ID) &&
161161
(phydev->interface <= PHY_INTERFACE_MODE_RGMII_RXID)) {
162162
val = phy_read_mmd_indirect(phydev, DP83867_RGMIICTL,
163-
DP83867_DEVADDR, phydev->addr);
163+
DP83867_DEVADDR);
164164

165165
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
166166
val |= (DP83867_RGMII_TX_CLK_DELAY_EN | DP83867_RGMII_RX_CLK_DELAY_EN);
@@ -172,13 +172,13 @@ static int dp83867_config_init(struct phy_device *phydev)
172172
val |= DP83867_RGMII_RX_CLK_DELAY_EN;
173173

174174
phy_write_mmd_indirect(phydev, DP83867_RGMIICTL,
175-
DP83867_DEVADDR, phydev->addr, val);
175+
DP83867_DEVADDR, val);
176176

177177
delay = (dp83867->rx_id_delay |
178178
(dp83867->tx_id_delay << DP83867_RGMII_TX_CLK_DELAY_SHIFT));
179179

180180
phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,
181-
DP83867_DEVADDR, phydev->addr, delay);
181+
DP83867_DEVADDR, delay);
182182
}
183183

184184
return 0;

‎drivers/net/phy/microchip.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -78,10 +78,9 @@ static int lan88xx_probe(struct phy_device *phydev)
7878
priv->wolopts = 0;
7979

8080
/* these values can be used to identify internal PHY */
81-
priv->chip_id = phy_read_mmd_indirect(phydev, LAN88XX_MMD3_CHIP_ID,
82-
3, phydev->addr);
81+
priv->chip_id = phy_read_mmd_indirect(phydev, LAN88XX_MMD3_CHIP_ID, 3);
8382
priv->chip_rev = phy_read_mmd_indirect(phydev, LAN88XX_MMD3_CHIP_REV,
84-
3, phydev->addr);
83+
3);
8584

8685
phydev->priv = priv;
8786

‎drivers/net/phy/phy.c

Lines changed: 14 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1029,7 +1029,6 @@ static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
10291029
* @phydev: The PHY device bus
10301030
* @prtad: MMD Address
10311031
* @devad: MMD DEVAD
1032-
* @addr: PHY address on the MII bus
10331032
*
10341033
* Description: it reads data from the MMD registers (clause 22 to access to
10351034
* clause 45) of the specified phy address.
@@ -1039,10 +1038,10 @@ static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
10391038
* 3) Write reg 13 // MMD Data Command for MMD DEVAD
10401039
* 3) Read reg 14 // Read MMD data
10411040
*/
1042-
int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,
1043-
int devad, int addr)
1041+
int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
10441042
{
10451043
struct phy_driver *phydrv = phydev->drv;
1044+
int addr = phydev->addr;
10461045
int value = -1;
10471046

10481047
if (!phydrv->read_mmd_indirect) {
@@ -1066,7 +1065,6 @@ EXPORT_SYMBOL(phy_read_mmd_indirect);
10661065
* @phydev: The PHY device
10671066
* @prtad: MMD Address
10681067
* @devad: MMD DEVAD
1069-
* @addr: PHY address on the MII bus
10701068
* @data: data to write in the MMD register
10711069
*
10721070
* Description: Write data from the MMD registers of the specified
@@ -1078,9 +1076,10 @@ EXPORT_SYMBOL(phy_read_mmd_indirect);
10781076
* 3) Write reg 14 // Write MMD data
10791077
*/
10801078
void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
1081-
int devad, int addr, u32 data)
1079+
int devad, u32 data)
10821080
{
10831081
struct phy_driver *phydrv = phydev->drv;
1082+
int addr = phydev->addr;
10841083

10851084
if (!phydrv->write_mmd_indirect) {
10861085
struct mii_bus *bus = phydev->bus;
@@ -1130,7 +1129,7 @@ int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
11301129

11311130
/* First check if the EEE ability is supported */
11321131
eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
1133-
MDIO_MMD_PCS, phydev->addr);
1132+
MDIO_MMD_PCS);
11341133
if (eee_cap <= 0)
11351134
goto eee_exit_err;
11361135

@@ -1142,12 +1141,12 @@ int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
11421141
* the EEE advertising registers.
11431142
*/
11441143
eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
1145-
MDIO_MMD_AN, phydev->addr);
1144+
MDIO_MMD_AN);
11461145
if (eee_lp <= 0)
11471146
goto eee_exit_err;
11481147

11491148
eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
1150-
MDIO_MMD_AN, phydev->addr);
1149+
MDIO_MMD_AN);
11511150
if (eee_adv <= 0)
11521151
goto eee_exit_err;
11531152

@@ -1161,15 +1160,13 @@ int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
11611160
* clock while it is signaling LPI.
11621161
*/
11631162
int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
1164-
MDIO_MMD_PCS,
1165-
phydev->addr);
1163+
MDIO_MMD_PCS);
11661164
if (val < 0)
11671165
return val;
11681166

11691167
val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
11701168
phy_write_mmd_indirect(phydev, MDIO_CTRL1,
1171-
MDIO_MMD_PCS, phydev->addr,
1172-
val);
1169+
MDIO_MMD_PCS, val);
11731170
}
11741171

11751172
return 0; /* EEE supported */
@@ -1188,8 +1185,7 @@ EXPORT_SYMBOL(phy_init_eee);
11881185
*/
11891186
int phy_get_eee_err(struct phy_device *phydev)
11901187
{
1191-
return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR,
1192-
MDIO_MMD_PCS, phydev->addr);
1188+
return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR, MDIO_MMD_PCS);
11931189
}
11941190
EXPORT_SYMBOL(phy_get_eee_err);
11951191

@@ -1206,22 +1202,19 @@ int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
12061202
int val;
12071203

12081204
/* Get Supported EEE */
1209-
val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
1210-
MDIO_MMD_PCS, phydev->addr);
1205+
val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE, MDIO_MMD_PCS);
12111206
if (val < 0)
12121207
return val;
12131208
data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
12141209

12151210
/* Get advertisement EEE */
1216-
val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
1217-
MDIO_MMD_AN, phydev->addr);
1211+
val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN);
12181212
if (val < 0)
12191213
return val;
12201214
data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
12211215

12221216
/* Get LP advertisement EEE */
1223-
val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
1224-
MDIO_MMD_AN, phydev->addr);
1217+
val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE, MDIO_MMD_AN);
12251218
if (val < 0)
12261219
return val;
12271220
data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
@@ -1241,8 +1234,7 @@ int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
12411234
{
12421235
int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
12431236

1244-
phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1245-
phydev->addr, val);
1237+
phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN, val);
12461238

12471239
return 0;
12481240
}

‎include/linux/phy.h

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -629,14 +629,12 @@ static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
629629
* phy_read_mmd_indirect - reads data from the MMD registers
630630
* @phydev: The PHY device bus
631631
* @prtad: MMD Address
632-
* @devad: MMD DEVAD
633632
* @addr: PHY address on the MII bus
634633
*
635634
* Description: it reads data from the MMD registers (clause 22 to access to
636635
* clause 45) of the specified phy address.
637636
*/
638-
int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,
639-
int devad, int addr);
637+
int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad);
640638

641639
/**
642640
* phy_read - Convenience function for reading a given PHY register
@@ -735,14 +733,13 @@ static inline int phy_write_mmd(struct phy_device *phydev, int devad,
735733
* @phydev: The PHY device
736734
* @prtad: MMD Address
737735
* @devad: MMD DEVAD
738-
* @addr: PHY address on the MII bus
739736
* @data: data to write in the MMD register
740737
*
741738
* Description: Write data from the MMD registers of the specified
742739
* phy address.
743740
*/
744741
void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
745-
int devad, int addr, u32 data);
742+
int devad, u32 data);
746743

747744
struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
748745
bool is_c45,

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