Skip to content

Commit 0670c5a

Browse files
vsyrjalavsyrjala
committed
drm/i915: Add 'offset' to uncore funcs
Add 'u32 offset' to the uncore register access functions. For now it's the same as 'reg', but once type safety gets added 'reg' will be the type safe register variable and 'offset' the raw offset. v2: s/uint32_t/u32/ (Chris) Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1446839236-20035-1-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
1 parent 8a74db7 commit 0670c5a

File tree

1 file changed

+25
-23
lines changed

1 file changed

+25
-23
lines changed

‎drivers/gpu/drm/i915/intel_uncore.c

Lines changed: 25 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -667,6 +667,7 @@ __gen2_read(64)
667667
#undef GEN2_READ_HEADER
668668

669669
#define GEN6_READ_HEADER(x) \
670+
u32 offset = reg; \
670671
unsigned long irqflags; \
671672
u##x val = 0; \
672673
assert_device_not_suspended(dev_priv); \
@@ -706,7 +707,7 @@ static u##x \
706707
gen6_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
707708
GEN6_READ_HEADER(x); \
708709
hsw_unclaimed_reg_debug(dev_priv, reg, true, true); \
709-
if (NEEDS_FORCE_WAKE(reg)) \
710+
if (NEEDS_FORCE_WAKE(offset)) \
710711
__force_wake_get(dev_priv, FORCEWAKE_RENDER); \
711712
val = __raw_i915_read##x(dev_priv, reg); \
712713
hsw_unclaimed_reg_debug(dev_priv, reg, true, false); \
@@ -718,11 +719,11 @@ static u##x \
718719
vlv_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
719720
enum forcewake_domains fw_engine = 0; \
720721
GEN6_READ_HEADER(x); \
721-
if (!NEEDS_FORCE_WAKE(reg)) \
722+
if (!NEEDS_FORCE_WAKE(offset)) \
722723
fw_engine = 0; \
723-
else if (FORCEWAKE_VLV_RENDER_RANGE_OFFSET(reg)) \
724+
else if (FORCEWAKE_VLV_RENDER_RANGE_OFFSET(offset)) \
724725
fw_engine = FORCEWAKE_RENDER; \
725-
else if (FORCEWAKE_VLV_MEDIA_RANGE_OFFSET(reg)) \
726+
else if (FORCEWAKE_VLV_MEDIA_RANGE_OFFSET(offset)) \
726727
fw_engine = FORCEWAKE_MEDIA; \
727728
if (fw_engine) \
728729
__force_wake_get(dev_priv, fw_engine); \
@@ -735,13 +736,13 @@ static u##x \
735736
chv_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
736737
enum forcewake_domains fw_engine = 0; \
737738
GEN6_READ_HEADER(x); \
738-
if (!NEEDS_FORCE_WAKE(reg)) \
739+
if (!NEEDS_FORCE_WAKE(offset)) \
739740
fw_engine = 0; \
740-
else if (FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg)) \
741+
else if (FORCEWAKE_CHV_RENDER_RANGE_OFFSET(offset)) \
741742
fw_engine = FORCEWAKE_RENDER; \
742-
else if (FORCEWAKE_CHV_MEDIA_RANGE_OFFSET(reg)) \
743+
else if (FORCEWAKE_CHV_MEDIA_RANGE_OFFSET(offset)) \
743744
fw_engine = FORCEWAKE_MEDIA; \
744-
else if (FORCEWAKE_CHV_COMMON_RANGE_OFFSET(reg)) \
745+
else if (FORCEWAKE_CHV_COMMON_RANGE_OFFSET(offset)) \
745746
fw_engine = FORCEWAKE_RENDER | FORCEWAKE_MEDIA; \
746747
if (fw_engine) \
747748
__force_wake_get(dev_priv, fw_engine); \
@@ -758,13 +759,13 @@ gen9_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
758759
enum forcewake_domains fw_engine; \
759760
GEN6_READ_HEADER(x); \
760761
hsw_unclaimed_reg_debug(dev_priv, reg, true, true); \
761-
if (!SKL_NEEDS_FORCE_WAKE(reg)) \
762+
if (!SKL_NEEDS_FORCE_WAKE(offset)) \
762763
fw_engine = 0; \
763-
else if (FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(reg)) \
764+
else if (FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(offset)) \
764765
fw_engine = FORCEWAKE_RENDER; \
765-
else if (FORCEWAKE_GEN9_MEDIA_RANGE_OFFSET(reg)) \
766+
else if (FORCEWAKE_GEN9_MEDIA_RANGE_OFFSET(offset)) \
766767
fw_engine = FORCEWAKE_MEDIA; \
767-
else if (FORCEWAKE_GEN9_COMMON_RANGE_OFFSET(reg)) \
768+
else if (FORCEWAKE_GEN9_COMMON_RANGE_OFFSET(offset)) \
768769
fw_engine = FORCEWAKE_RENDER | FORCEWAKE_MEDIA; \
769770
else \
770771
fw_engine = FORCEWAKE_BLITTER; \
@@ -866,6 +867,7 @@ __gen2_write(64)
866867
#undef GEN2_WRITE_HEADER
867868

868869
#define GEN6_WRITE_HEADER \
870+
u32 offset = reg; \
869871
unsigned long irqflags; \
870872
trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
871873
assert_device_not_suspended(dev_priv); \
@@ -879,7 +881,7 @@ static void \
879881
gen6_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
880882
u32 __fifo_ret = 0; \
881883
GEN6_WRITE_HEADER; \
882-
if (NEEDS_FORCE_WAKE(reg)) { \
884+
if (NEEDS_FORCE_WAKE(offset)) { \
883885
__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
884886
} \
885887
__raw_i915_write##x(dev_priv, reg, val); \
@@ -894,7 +896,7 @@ static void \
894896
hsw_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
895897
u32 __fifo_ret = 0; \
896898
GEN6_WRITE_HEADER; \
897-
if (NEEDS_FORCE_WAKE(reg)) { \
899+
if (NEEDS_FORCE_WAKE(offset)) { \
898900
__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
899901
} \
900902
hsw_unclaimed_reg_debug(dev_priv, reg, false, true); \
@@ -933,7 +935,7 @@ static void \
933935
gen8_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
934936
GEN6_WRITE_HEADER; \
935937
hsw_unclaimed_reg_debug(dev_priv, reg, false, true); \
936-
if (NEEDS_FORCE_WAKE(reg) && !is_gen8_shadowed(dev_priv, reg)) \
938+
if (NEEDS_FORCE_WAKE(offset) && !is_gen8_shadowed(dev_priv, reg)) \
937939
__force_wake_get(dev_priv, FORCEWAKE_RENDER); \
938940
__raw_i915_write##x(dev_priv, reg, val); \
939941
hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \
@@ -946,14 +948,14 @@ static void \
946948
chv_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
947949
enum forcewake_domains fw_engine = 0; \
948950
GEN6_WRITE_HEADER; \
949-
if (!NEEDS_FORCE_WAKE(reg) || \
951+
if (!NEEDS_FORCE_WAKE(offset) || \
950952
is_gen8_shadowed(dev_priv, reg)) \
951953
fw_engine = 0; \
952-
else if (FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg)) \
954+
else if (FORCEWAKE_CHV_RENDER_RANGE_OFFSET(offset)) \
953955
fw_engine = FORCEWAKE_RENDER; \
954-
else if (FORCEWAKE_CHV_MEDIA_RANGE_OFFSET(reg)) \
956+
else if (FORCEWAKE_CHV_MEDIA_RANGE_OFFSET(offset)) \
955957
fw_engine = FORCEWAKE_MEDIA; \
956-
else if (FORCEWAKE_CHV_COMMON_RANGE_OFFSET(reg)) \
958+
else if (FORCEWAKE_CHV_COMMON_RANGE_OFFSET(offset)) \
957959
fw_engine = FORCEWAKE_RENDER | FORCEWAKE_MEDIA; \
958960
if (fw_engine) \
959961
__force_wake_get(dev_priv, fw_engine); \
@@ -991,14 +993,14 @@ gen9_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, \
991993
enum forcewake_domains fw_engine; \
992994
GEN6_WRITE_HEADER; \
993995
hsw_unclaimed_reg_debug(dev_priv, reg, false, true); \
994-
if (!SKL_NEEDS_FORCE_WAKE(reg) || \
996+
if (!SKL_NEEDS_FORCE_WAKE(offset) || \
995997
is_gen9_shadowed(dev_priv, reg)) \
996998
fw_engine = 0; \
997-
else if (FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(reg)) \
999+
else if (FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(offset)) \
9981000
fw_engine = FORCEWAKE_RENDER; \
999-
else if (FORCEWAKE_GEN9_MEDIA_RANGE_OFFSET(reg)) \
1001+
else if (FORCEWAKE_GEN9_MEDIA_RANGE_OFFSET(offset)) \
10001002
fw_engine = FORCEWAKE_MEDIA; \
1001-
else if (FORCEWAKE_GEN9_COMMON_RANGE_OFFSET(reg)) \
1003+
else if (FORCEWAKE_GEN9_COMMON_RANGE_OFFSET(offset)) \
10021004
fw_engine = FORCEWAKE_RENDER | FORCEWAKE_MEDIA; \
10031005
else \
10041006
fw_engine = FORCEWAKE_BLITTER; \

0 commit comments

Comments
 (0)