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chelsiocudbgdavem330
chelsiocudbg
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davem330
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cxgb4: collect hardware scheduler dumps
Collect hardware TX traffic scheduler and pace tables. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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9 files changed

+119
-0
lines changed

9 files changed

+119
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‎drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,14 @@ struct cudbg_rss_vf_conf {
4949
u32 rss_vf_vfh;
5050
};
5151

52+
struct cudbg_hw_sched {
53+
u32 kbps[NTX_SCHED];
54+
u32 ipg[NTX_SCHED];
55+
u32 pace_tab[NTX_SCHED];
56+
u32 mode;
57+
u32 map;
58+
};
59+
5260
struct ireg_field {
5361
u32 ireg_addr;
5462
u32 ireg_data;

‎drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222
#define CUDBG_STATUS_NO_MEM -19
2323
#define CUDBG_STATUS_ENTITY_NOT_FOUND -24
2424
#define CUDBG_SYSTEM_ERROR -29
25+
#define CUDBG_STATUS_CCLK_NOT_DEFINED -32
2526

2627
#define CUDBG_MAJOR_VERSION 1
2728
#define CUDBG_MINOR_VERSION 14
@@ -48,6 +49,7 @@ enum cudbg_dbg_entity_type {
4849
CUDBG_EDC1 = 19,
4950
CUDBG_RSS = 22,
5051
CUDBG_RSS_VF_CONF = 25,
52+
CUDBG_HW_SCHED = 31,
5153
CUDBG_TP_INDIRECT = 36,
5254
CUDBG_SGE_INDIRECT = 37,
5355
CUDBG_ULPRX_LA = 41,

‎drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -574,6 +574,31 @@ int cudbg_collect_rss_vf_config(struct cudbg_init *pdbg_init,
574574
return rc;
575575
}
576576

577+
int cudbg_collect_hw_sched(struct cudbg_init *pdbg_init,
578+
struct cudbg_buffer *dbg_buff,
579+
struct cudbg_error *cudbg_err)
580+
{
581+
struct adapter *padap = pdbg_init->adap;
582+
struct cudbg_buffer temp_buff = { 0 };
583+
struct cudbg_hw_sched *hw_sched_buff;
584+
int i, rc = 0;
585+
586+
if (!padap->params.vpd.cclk)
587+
return CUDBG_STATUS_CCLK_NOT_DEFINED;
588+
589+
rc = cudbg_get_buff(dbg_buff, sizeof(struct cudbg_hw_sched),
590+
&temp_buff);
591+
hw_sched_buff = (struct cudbg_hw_sched *)temp_buff.data;
592+
hw_sched_buff->map = t4_read_reg(padap, TP_TX_MOD_QUEUE_REQ_MAP_A);
593+
hw_sched_buff->mode = TIMERMODE_G(t4_read_reg(padap, TP_MOD_CONFIG_A));
594+
t4_read_pace_tbl(padap, hw_sched_buff->pace_tab);
595+
for (i = 0; i < NTX_SCHED; ++i)
596+
t4_get_tx_sched(padap, i, &hw_sched_buff->kbps[i],
597+
&hw_sched_buff->ipg[i], true);
598+
cudbg_write_and_release_buff(&temp_buff, dbg_buff);
599+
return rc;
600+
}
601+
577602
int cudbg_collect_tp_indirect(struct cudbg_init *pdbg_init,
578603
struct cudbg_buffer *dbg_buff,
579604
struct cudbg_error *cudbg_err)

‎drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -84,6 +84,9 @@ int cudbg_collect_rss_vf_config(struct cudbg_init *pdbg_init,
8484
int cudbg_collect_tp_indirect(struct cudbg_init *pdbg_init,
8585
struct cudbg_buffer *dbg_buff,
8686
struct cudbg_error *cudbg_err);
87+
int cudbg_collect_hw_sched(struct cudbg_init *pdbg_init,
88+
struct cudbg_buffer *dbg_buff,
89+
struct cudbg_error *cudbg_err);
8790
int cudbg_collect_sge_indirect(struct cudbg_init *pdbg_init,
8891
struct cudbg_buffer *dbg_buff,
8992
struct cudbg_error *cudbg_err);

‎drivers/net/ethernet/chelsio/cxgb4/cxgb4.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1335,6 +1335,12 @@ static inline unsigned int core_ticks_to_us(const struct adapter *adapter,
13351335
adapter->params.vpd.cclk);
13361336
}
13371337

1338+
static inline unsigned int dack_ticks_to_usec(const struct adapter *adap,
1339+
unsigned int ticks)
1340+
{
1341+
return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap);
1342+
}
1343+
13381344
void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask,
13391345
u32 val);
13401346

@@ -1636,6 +1642,9 @@ void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp,
16361642
int filter_index, int *enabled);
16371643
int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox,
16381644
u32 addr, u32 val);
1645+
void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]);
1646+
void t4_get_tx_sched(struct adapter *adap, unsigned int sched,
1647+
unsigned int *kbps, unsigned int *ipg, bool sleep_ok);
16391648
int t4_sched_params(struct adapter *adapter, int type, int level, int mode,
16401649
int rateunit, int ratemode, int channel, int class,
16411650
int minrate, int maxrate, int weight, int pktsize);

‎drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,7 @@ static const struct cxgb4_collect_entity cxgb4_collect_hw_dump[] = {
4646
{ CUDBG_CIM_OBQ_NCSI, cudbg_collect_cim_obq_ncsi },
4747
{ CUDBG_RSS, cudbg_collect_rss },
4848
{ CUDBG_RSS_VF_CONF, cudbg_collect_rss_vf_config },
49+
{ CUDBG_HW_SCHED, cudbg_collect_hw_sched },
4950
{ CUDBG_TP_INDIRECT, cudbg_collect_tp_indirect },
5051
{ CUDBG_SGE_INDIRECT, cudbg_collect_sge_indirect },
5152
{ CUDBG_ULPRX_LA, cudbg_collect_ulprx_la },
@@ -156,6 +157,9 @@ static u32 cxgb4_get_entity_length(struct adapter *adap, u32 entity)
156157
len = adap->params.arch.vfcount *
157158
sizeof(struct cudbg_rss_vf_conf);
158159
break;
160+
case CUDBG_HW_SCHED:
161+
len = sizeof(struct cudbg_hw_sched);
162+
break;
159163
case CUDBG_TP_INDIRECT:
160164
switch (CHELSIO_CHIP_VERSION(adap->params.chip)) {
161165
case CHELSIO_T5:

‎drivers/net/ethernet/chelsio/cxgb4/t4_hw.c

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9547,6 +9547,63 @@ int t4_set_vf_mac_acl(struct adapter *adapter, unsigned int vf,
95479547
return t4_wr_mbox(adapter, adapter->mbox, &cmd, sizeof(cmd), &cmd);
95489548
}
95499549

9550+
/**
9551+
* t4_read_pace_tbl - read the pace table
9552+
* @adap: the adapter
9553+
* @pace_vals: holds the returned values
9554+
*
9555+
* Returns the values of TP's pace table in microseconds.
9556+
*/
9557+
void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED])
9558+
{
9559+
unsigned int i, v;
9560+
9561+
for (i = 0; i < NTX_SCHED; i++) {
9562+
t4_write_reg(adap, TP_PACE_TABLE_A, 0xffff0000 + i);
9563+
v = t4_read_reg(adap, TP_PACE_TABLE_A);
9564+
pace_vals[i] = dack_ticks_to_usec(adap, v);
9565+
}
9566+
}
9567+
9568+
/**
9569+
* t4_get_tx_sched - get the configuration of a Tx HW traffic scheduler
9570+
* @adap: the adapter
9571+
* @sched: the scheduler index
9572+
* @kbps: the byte rate in Kbps
9573+
* @ipg: the interpacket delay in tenths of nanoseconds
9574+
* @sleep_ok: if true we may sleep while awaiting command completion
9575+
*
9576+
* Return the current configuration of a HW Tx scheduler.
9577+
*/
9578+
void t4_get_tx_sched(struct adapter *adap, unsigned int sched,
9579+
unsigned int *kbps, unsigned int *ipg, bool sleep_ok)
9580+
{
9581+
unsigned int v, addr, bpt, cpt;
9582+
9583+
if (kbps) {
9584+
addr = TP_TX_MOD_Q1_Q0_RATE_LIMIT_A - sched / 2;
9585+
t4_tp_tm_pio_read(adap, &v, 1, addr, sleep_ok);
9586+
if (sched & 1)
9587+
v >>= 16;
9588+
bpt = (v >> 8) & 0xff;
9589+
cpt = v & 0xff;
9590+
if (!cpt) {
9591+
*kbps = 0; /* scheduler disabled */
9592+
} else {
9593+
v = (adap->params.vpd.cclk * 1000) / cpt; /* ticks/s */
9594+
*kbps = (v * bpt) / 125;
9595+
}
9596+
}
9597+
if (ipg) {
9598+
addr = TP_TX_MOD_Q1_Q0_TIMER_SEPARATOR_A - sched / 2;
9599+
t4_tp_tm_pio_read(adap, &v, 1, addr, sleep_ok);
9600+
if (sched & 1)
9601+
v >>= 16;
9602+
v &= 0xffff;
9603+
*ipg = (10000 * v) / core_ticks_per_usec(adap);
9604+
}
9605+
}
9606+
95509607
int t4_sched_params(struct adapter *adapter, int type, int level, int mode,
95519608
int rateunit, int ratemode, int channel, int class,
95529609
int minrate, int maxrate, int weight, int pktsize)

‎drivers/net/ethernet/chelsio/cxgb4/t4_hw.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,7 @@ enum {
4747
TCB_SIZE = 128, /* TCB size */
4848
NMTUS = 16, /* size of MTU table */
4949
NCCTRL_WIN = 32, /* # of congestion control windows */
50+
NTX_SCHED = 8, /* # of HW Tx scheduling queues */
5051
PM_NSTATS = 5, /* # of PM stats */
5152
T6_PM_NSTATS = 7, /* # of PM stats in T6 */
5253
MBOX_LEN = 64, /* mailbox size in bytes */

‎drivers/net/ethernet/chelsio/cxgb4/t4_regs.h

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1415,6 +1415,7 @@
14151415
#define ROWINDEX_V(x) ((x) << ROWINDEX_S)
14161416

14171417
#define TP_CCTRL_TABLE_A 0x7ddc
1418+
#define TP_PACE_TABLE_A 0x7dd8
14181419
#define TP_MTU_TABLE_A 0x7de4
14191420

14201421
#define MTUINDEX_S 24
@@ -1449,6 +1450,15 @@
14491450

14501451
#define TP_TM_PIO_ADDR_A 0x7e18
14511452
#define TP_TM_PIO_DATA_A 0x7e1c
1453+
#define TP_MOD_CONFIG_A 0x7e24
1454+
1455+
#define TIMERMODE_S 8
1456+
#define TIMERMODE_M 0xffU
1457+
#define TIMERMODE_G(x) (((x) >> TIMERMODE_S) & TIMERMODE_M)
1458+
1459+
#define TP_TX_MOD_Q1_Q0_TIMER_SEPARATOR_A 0x3
1460+
#define TP_TX_MOD_Q1_Q0_RATE_LIMIT_A 0x8
1461+
14521462
#define TP_PIO_ADDR_A 0x7e40
14531463
#define TP_PIO_DATA_A 0x7e44
14541464
#define TP_MIB_INDEX_A 0x7e50

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