Skip to content

Commit 09e71a6

Browse files
davejiangjonmason
authored andcommitted
ntb: fix SKX NTB config space size register offsets
The offsets for the SZ registers are wrong. Updated. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Reported-by: Sandeep Mann <sandeep@purestorage.com> Tested-by: Zachary Ross <zacharyx.ross@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
1 parent 5c43c52 commit 09e71a6

File tree

1 file changed

+4
-4
lines changed

1 file changed

+4
-4
lines changed

drivers/ntb/hw/intel/ntb_hw_intel.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -152,10 +152,10 @@
152152
#define XEON_SPAD_COUNT 16
153153

154154
/* Intel Skylake Xeon hardware */
155-
#define SKX_IMBAR1SZ_OFFSET 0x00d1
156-
#define SKX_IMBAR2SZ_OFFSET 0x00d5
157-
#define SKX_EMBAR1SZ_OFFSET 0x00d3
158-
#define SKX_EMBAR2SZ_OFFSET 0x00d6
155+
#define SKX_IMBAR1SZ_OFFSET 0x00d0
156+
#define SKX_IMBAR2SZ_OFFSET 0x00d1
157+
#define SKX_EMBAR1SZ_OFFSET 0x00d2
158+
#define SKX_EMBAR2SZ_OFFSET 0x00d3
159159
#define SKX_DEVCTRL_OFFSET 0x0098
160160
#define SKX_DEVSTS_OFFSET 0x009a
161161
#define SKX_UNCERRSTS_OFFSET 0x014c

0 commit comments

Comments
 (0)