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Sunil Gouthamdavem330
Sunil Goutham
authored and
davem330
committed
net: thunderx: Support for different LMAC types within BGX
On 88xx all LMACs in a BGX will be in same mode but on 81xx BGX can be split as two and there can be LMACs configured in different modes. These changes move lmac_type, lane2serdes fields into per lmac struct from BGX struct. Got rid of qlm_mode field which has become redundant with these changes. And now no of valid LMACs is read from CSRs configured by low level firmware and figuring out the same based on QLM mode is discarded Signed-off-by: Sunil Goutham <sgoutham@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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-136
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2 files changed

+98
-136
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‎drivers/net/ethernet/cavium/thunder/thunder_bgx.c

Lines changed: 98 additions & 126 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,9 @@ struct lmac {
2828
struct bgx *bgx;
2929
int dmac;
3030
u8 mac[ETH_ALEN];
31+
u8 lmac_type;
32+
u8 lane_to_sds;
33+
bool use_training;
3134
bool link_up;
3235
int lmacid; /* ID within BGX */
3336
int lmacid_bd; /* ID on board */
@@ -43,12 +46,8 @@ struct lmac {
4346

4447
struct bgx {
4548
u8 bgx_id;
46-
u8 qlm_mode;
4749
struct lmac lmac[MAX_LMAC_PER_BGX];
4850
int lmac_count;
49-
int lmac_type;
50-
int lane_to_sds;
51-
int use_training;
5251
void __iomem *reg_base;
5352
struct pci_dev *pdev;
5453
};
@@ -418,9 +417,10 @@ static int bgx_lmac_sgmii_init(struct bgx *bgx, int lmacid)
418417
return 0;
419418
}
420419

421-
static int bgx_lmac_xaui_init(struct bgx *bgx, int lmacid, int lmac_type)
420+
static int bgx_lmac_xaui_init(struct bgx *bgx, struct lmac *lmac)
422421
{
423422
u64 cfg;
423+
int lmacid = lmac->lmacid;
424424

425425
/* Reset SPU */
426426
bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET);
@@ -436,7 +436,7 @@ static int bgx_lmac_xaui_init(struct bgx *bgx, int lmacid, int lmac_type)
436436

437437
bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER);
438438
/* Set interleaved running disparity for RXAUI */
439-
if (bgx->lmac_type != BGX_MODE_RXAUI)
439+
if (lmac->lmac_type != BGX_MODE_RXAUI)
440440
bgx_reg_modify(bgx, lmacid,
441441
BGX_SPUX_MISC_CONTROL, SPU_MISC_CTL_RX_DIS);
442442
else
@@ -451,7 +451,7 @@ static int bgx_lmac_xaui_init(struct bgx *bgx, int lmacid, int lmac_type)
451451
cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT);
452452
bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg);
453453

454-
if (bgx->use_training) {
454+
if (lmac->use_training) {
455455
bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LP_CUP, 0x00);
456456
bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_CUP, 0x00);
457457
bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_REP, 0x00);
@@ -474,9 +474,9 @@ static int bgx_lmac_xaui_init(struct bgx *bgx, int lmacid, int lmac_type)
474474
bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_CONTROL, cfg);
475475

476476
cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_ADV);
477-
if (bgx->lmac_type == BGX_MODE_10G_KR)
477+
if (lmac->lmac_type == BGX_MODE_10G_KR)
478478
cfg |= (1 << 23);
479-
else if (bgx->lmac_type == BGX_MODE_40G_KR)
479+
else if (lmac->lmac_type == BGX_MODE_40G_KR)
480480
cfg |= (1 << 24);
481481
else
482482
cfg &= ~((1 << 23) | (1 << 24));
@@ -511,11 +511,11 @@ static int bgx_xaui_check_link(struct lmac *lmac)
511511
{
512512
struct bgx *bgx = lmac->bgx;
513513
int lmacid = lmac->lmacid;
514-
int lmac_type = bgx->lmac_type;
514+
int lmac_type = lmac->lmac_type;
515515
u64 cfg;
516516

517517
bgx_reg_modify(bgx, lmacid, BGX_SPUX_MISC_CONTROL, SPU_MISC_CTL_RX_DIS);
518-
if (bgx->use_training) {
518+
if (lmac->use_training) {
519519
cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT);
520520
if (!(cfg & (1ull << 13))) {
521521
cfg = (1ull << 13) | (1ull << 14);
@@ -556,7 +556,7 @@ static int bgx_xaui_check_link(struct lmac *lmac)
556556
BGX_SPUX_STATUS2, SPU_STATUS2_RCVFLT);
557557
if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) {
558558
dev_err(&bgx->pdev->dev, "Receive fault, retry training\n");
559-
if (bgx->use_training) {
559+
if (lmac->use_training) {
560560
cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT);
561561
if (!(cfg & (1ull << 13))) {
562562
cfg = (1ull << 13) | (1ull << 14);
@@ -599,7 +599,7 @@ static int bgx_xaui_check_link(struct lmac *lmac)
599599
/* Rx local/remote fault seen.
600600
* Do lmac reinit to see if condition recovers
601601
*/
602-
bgx_lmac_xaui_init(bgx, lmacid, bgx->lmac_type);
602+
bgx_lmac_xaui_init(bgx, lmac);
603603

604604
return -1;
605605
}
@@ -623,7 +623,7 @@ static void bgx_poll_for_link(struct work_struct *work)
623623
if ((spu_link & SPU_STATUS1_RCV_LNK) &&
624624
!(smu_link & SMU_RX_CTL_STATUS)) {
625625
lmac->link_up = 1;
626-
if (lmac->bgx->lmac_type == BGX_MODE_XLAUI)
626+
if (lmac->lmac_type == BGX_MODE_XLAUI)
627627
lmac->last_speed = 40000;
628628
else
629629
lmac->last_speed = 10000;
@@ -657,13 +657,13 @@ static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid)
657657
lmac = &bgx->lmac[lmacid];
658658
lmac->bgx = bgx;
659659

660-
if (bgx->lmac_type == BGX_MODE_SGMII) {
660+
if (lmac->lmac_type == BGX_MODE_SGMII) {
661661
lmac->is_sgmii = 1;
662662
if (bgx_lmac_sgmii_init(bgx, lmacid))
663663
return -1;
664664
} else {
665665
lmac->is_sgmii = 0;
666-
if (bgx_lmac_xaui_init(bgx, lmacid, bgx->lmac_type))
666+
if (bgx_lmac_xaui_init(bgx, lmac))
667667
return -1;
668668
}
669669

@@ -685,10 +685,10 @@ static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid)
685685
/* Restore default cfg, incase low level firmware changed it */
686686
bgx_reg_write(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL, 0x03);
687687

688-
if ((bgx->lmac_type != BGX_MODE_XFI) &&
689-
(bgx->lmac_type != BGX_MODE_XLAUI) &&
690-
(bgx->lmac_type != BGX_MODE_40G_KR) &&
691-
(bgx->lmac_type != BGX_MODE_10G_KR)) {
688+
if ((lmac->lmac_type != BGX_MODE_XFI) &&
689+
(lmac->lmac_type != BGX_MODE_XLAUI) &&
690+
(lmac->lmac_type != BGX_MODE_40G_KR) &&
691+
(lmac->lmac_type != BGX_MODE_10G_KR)) {
692692
if (!lmac->phydev)
693693
return -ENODEV;
694694

@@ -753,94 +753,29 @@ static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid)
753753

754754
bgx_flush_dmac_addrs(bgx, lmacid);
755755

756-
if ((bgx->lmac_type != BGX_MODE_XFI) &&
757-
(bgx->lmac_type != BGX_MODE_XLAUI) &&
758-
(bgx->lmac_type != BGX_MODE_40G_KR) &&
759-
(bgx->lmac_type != BGX_MODE_10G_KR) && lmac->phydev)
756+
if ((lmac->lmac_type != BGX_MODE_XFI) &&
757+
(lmac->lmac_type != BGX_MODE_XLAUI) &&
758+
(lmac->lmac_type != BGX_MODE_40G_KR) &&
759+
(lmac->lmac_type != BGX_MODE_10G_KR) && lmac->phydev)
760760
phy_disconnect(lmac->phydev);
761761

762762
lmac->phydev = NULL;
763763
}
764764

765-
static void bgx_set_num_ports(struct bgx *bgx)
766-
{
767-
u64 lmac_count;
768-
769-
switch (bgx->qlm_mode) {
770-
case QLM_MODE_SGMII:
771-
bgx->lmac_count = 4;
772-
bgx->lmac_type = BGX_MODE_SGMII;
773-
bgx->lane_to_sds = 0;
774-
break;
775-
case QLM_MODE_XAUI_1X4:
776-
bgx->lmac_count = 1;
777-
bgx->lmac_type = BGX_MODE_XAUI;
778-
bgx->lane_to_sds = 0xE4;
779-
break;
780-
case QLM_MODE_RXAUI_2X2:
781-
bgx->lmac_count = 2;
782-
bgx->lmac_type = BGX_MODE_RXAUI;
783-
bgx->lane_to_sds = 0xE4;
784-
break;
785-
case QLM_MODE_XFI_4X1:
786-
bgx->lmac_count = 4;
787-
bgx->lmac_type = BGX_MODE_XFI;
788-
bgx->lane_to_sds = 0;
789-
break;
790-
case QLM_MODE_XLAUI_1X4:
791-
bgx->lmac_count = 1;
792-
bgx->lmac_type = BGX_MODE_XLAUI;
793-
bgx->lane_to_sds = 0xE4;
794-
break;
795-
case QLM_MODE_10G_KR_4X1:
796-
bgx->lmac_count = 4;
797-
bgx->lmac_type = BGX_MODE_10G_KR;
798-
bgx->lane_to_sds = 0;
799-
bgx->use_training = 1;
800-
break;
801-
case QLM_MODE_40G_KR4_1X4:
802-
bgx->lmac_count = 1;
803-
bgx->lmac_type = BGX_MODE_40G_KR;
804-
bgx->lane_to_sds = 0xE4;
805-
bgx->use_training = 1;
806-
break;
807-
default:
808-
bgx->lmac_count = 0;
809-
break;
810-
}
811-
812-
/* Check if low level firmware has programmed LMAC count
813-
* based on board type, if yes consider that otherwise
814-
* the default static values
815-
*/
816-
lmac_count = bgx_reg_read(bgx, 0, BGX_CMR_RX_LMACS) & 0x7;
817-
if (lmac_count != 4)
818-
bgx->lmac_count = lmac_count;
819-
}
820-
821765
static void bgx_init_hw(struct bgx *bgx)
822766
{
823767
int i;
824-
825-
bgx_set_num_ports(bgx);
768+
struct lmac *lmac;
826769

827770
bgx_reg_modify(bgx, 0, BGX_CMR_GLOBAL_CFG, CMR_GLOBAL_CFG_FCS_STRIP);
828771
if (bgx_reg_read(bgx, 0, BGX_CMR_BIST_STATUS))
829772
dev_err(&bgx->pdev->dev, "BGX%d BIST failed\n", bgx->bgx_id);
830773

831774
/* Set lmac type and lane2serdes mapping */
832775
for (i = 0; i < bgx->lmac_count; i++) {
833-
if (bgx->lmac_type == BGX_MODE_RXAUI) {
834-
if (i)
835-
bgx->lane_to_sds = 0x0e;
836-
else
837-
bgx->lane_to_sds = 0x04;
838-
bgx_reg_write(bgx, i, BGX_CMRX_CFG,
839-
(bgx->lmac_type << 8) | bgx->lane_to_sds);
840-
continue;
841-
}
776+
lmac = &bgx->lmac[i];
842777
bgx_reg_write(bgx, i, BGX_CMRX_CFG,
843-
(bgx->lmac_type << 8) | (bgx->lane_to_sds + i));
778+
(lmac->lmac_type << 8) | lmac->lane_to_sds);
844779
bgx->lmac[i].lmacid_bd = lmac_count;
845780
lmac_count++;
846781
}
@@ -863,58 +798,95 @@ static void bgx_init_hw(struct bgx *bgx)
863798
bgx_reg_write(bgx, 0, BGX_CMR_RX_STREERING + (i * 8), 0x00);
864799
}
865800

866-
static void bgx_get_qlm_mode(struct bgx *bgx)
801+
static void bgx_print_qlm_mode(struct bgx *bgx, u8 lmacid)
867802
{
868803
struct device *dev = &bgx->pdev->dev;
869-
int lmac_type;
870-
int train_en;
871-
872-
/* Read LMAC0 type to figure out QLM mode
873-
* This is configured by low level firmware
874-
*/
875-
lmac_type = bgx_reg_read(bgx, 0, BGX_CMRX_CFG);
876-
lmac_type = (lmac_type >> 8) & 0x07;
804+
struct lmac *lmac;
805+
char str[20];
877806

878-
train_en = bgx_reg_read(bgx, 0, BGX_SPUX_BR_PMD_CRTL) &
879-
SPU_PMD_CRTL_TRAIN_EN;
807+
lmac = &bgx->lmac[lmacid];
808+
sprintf(str, "BGX%d QLM mode", bgx->bgx_id);
880809

881-
switch (lmac_type) {
810+
switch (lmac->lmac_type) {
882811
case BGX_MODE_SGMII:
883-
bgx->qlm_mode = QLM_MODE_SGMII;
884-
dev_info(dev, "BGX%d QLM mode: SGMII\n", bgx->bgx_id);
812+
dev_info(dev, "%s: SGMII\n", (char *)str);
885813
break;
886814
case BGX_MODE_XAUI:
887-
bgx->qlm_mode = QLM_MODE_XAUI_1X4;
888-
dev_info(dev, "BGX%d QLM mode: XAUI\n", bgx->bgx_id);
815+
dev_info(dev, "%s: XAUI\n", (char *)str);
889816
break;
890817
case BGX_MODE_RXAUI:
891-
bgx->qlm_mode = QLM_MODE_RXAUI_2X2;
892-
dev_info(dev, "BGX%d QLM mode: RXAUI\n", bgx->bgx_id);
818+
dev_info(dev, "%s: RXAUI\n", (char *)str);
893819
break;
894820
case BGX_MODE_XFI:
895-
if (!train_en) {
896-
bgx->qlm_mode = QLM_MODE_XFI_4X1;
897-
dev_info(dev, "BGX%d QLM mode: XFI\n", bgx->bgx_id);
898-
} else {
899-
bgx->qlm_mode = QLM_MODE_10G_KR_4X1;
900-
dev_info(dev, "BGX%d QLM mode: 10G_KR\n", bgx->bgx_id);
901-
}
821+
if (!lmac->use_training)
822+
dev_info(dev, "%s: XFI\n", (char *)str);
823+
else
824+
dev_info(dev, "%s: 10G_KR\n", (char *)str);
902825
break;
903826
case BGX_MODE_XLAUI:
904-
if (!train_en) {
905-
bgx->qlm_mode = QLM_MODE_XLAUI_1X4;
906-
dev_info(dev, "BGX%d QLM mode: XLAUI\n", bgx->bgx_id);
907-
} else {
908-
bgx->qlm_mode = QLM_MODE_40G_KR4_1X4;
909-
dev_info(dev, "BGX%d QLM mode: 40G_KR4\n", bgx->bgx_id);
910-
}
827+
if (!lmac->use_training)
828+
dev_info(dev, "%s: XLAUI\n", (char *)str);
829+
else
830+
dev_info(dev, "%s: 40G_KR4\n", (char *)str);
911831
break;
912832
default:
913-
bgx->qlm_mode = QLM_MODE_SGMII;
914-
dev_info(dev, "BGX%d QLM default mode: SGMII\n", bgx->bgx_id);
833+
dev_info(dev, "%s: INVALID\n", (char *)str);
915834
}
916835
}
917836

837+
static void lmac_set_lane2sds(struct lmac *lmac)
838+
{
839+
switch (lmac->lmac_type) {
840+
case BGX_MODE_SGMII:
841+
case BGX_MODE_XFI:
842+
lmac->lane_to_sds = lmac->lmacid;
843+
break;
844+
case BGX_MODE_XAUI:
845+
case BGX_MODE_XLAUI:
846+
lmac->lane_to_sds = 0xE4;
847+
break;
848+
case BGX_MODE_RXAUI:
849+
lmac->lane_to_sds = (lmac->lmacid) ? 0xE : 0x4;
850+
break;
851+
default:
852+
lmac->lane_to_sds = 0;
853+
break;
854+
}
855+
}
856+
857+
static void bgx_set_lmac_config(struct bgx *bgx, u8 idx)
858+
{
859+
struct lmac *lmac;
860+
u64 cmr_cfg;
861+
862+
lmac = &bgx->lmac[idx];
863+
lmac->lmacid = idx;
864+
865+
/* Read LMAC0 type to figure out QLM mode
866+
* This is configured by low level firmware
867+
*/
868+
cmr_cfg = bgx_reg_read(bgx, 0, BGX_CMRX_CFG);
869+
lmac->lmac_type = (cmr_cfg >> 8) & 0x07;
870+
lmac->use_training =
871+
bgx_reg_read(bgx, 0, BGX_SPUX_BR_PMD_CRTL) &
872+
SPU_PMD_CRTL_TRAIN_EN;
873+
lmac_set_lane2sds(lmac);
874+
}
875+
876+
static void bgx_get_qlm_mode(struct bgx *bgx)
877+
{
878+
u8 idx;
879+
880+
/* It is assumed that low level firmware sets this value */
881+
bgx->lmac_count = bgx_reg_read(bgx, 0, BGX_CMR_RX_LMACS) & 0x7;
882+
if (bgx->lmac_count > MAX_LMAC_PER_BGX)
883+
bgx->lmac_count = MAX_LMAC_PER_BGX;
884+
885+
for (idx = 0; idx < bgx->lmac_count; idx++)
886+
bgx_set_lmac_config(bgx, idx);
887+
bgx_print_qlm_mode(bgx, 0);
888+
}
889+
918890
#ifdef CONFIG_ACPI
919891

920892
static int acpi_get_mac_address(struct device *dev, struct acpi_device *adev,

‎drivers/net/ethernet/cavium/thunder/thunder_bgx.h

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -217,14 +217,4 @@ enum LMAC_TYPE {
217217
BGX_MODE_40G_KR = 4,/* 4 lanes, 10.3125 Gbaud */
218218
};
219219

220-
enum qlm_mode {
221-
QLM_MODE_SGMII, /* SGMII, each lane independent */
222-
QLM_MODE_XAUI_1X4, /* 1 XAUI or DXAUI, 4 lanes */
223-
QLM_MODE_RXAUI_2X2, /* 2 RXAUI, 2 lanes each */
224-
QLM_MODE_XFI_4X1, /* 4 XFI, 1 lane each */
225-
QLM_MODE_XLAUI_1X4, /* 1 XLAUI, 4 lanes each */
226-
QLM_MODE_10G_KR_4X1, /* 4 10GBASE-KR, 1 lane each */
227-
QLM_MODE_40G_KR4_1X4, /* 1 40GBASE-KR4, 4 lanes each */
228-
};
229-
230220
#endif /* THUNDER_BGX_H */

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