drm/i915: Setup PIPE_CHICKEN for fastsets too

vsyrjala · vsyrjala · commit 108d14bdaef6 · 2019-02-05T21:57:58.000+02:00
Configure PIPE_CHICKEN during intel_update_pipe_config() to make sure we have our chickens in a row with fastboot too. v2: Apparently PIPE_CHICKEN is icl+ only Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190204202214.27051-1-ville.syrjala@linux.intel.com Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
@@ -3958,6 +3958,9 @@ static void intel_update_pipe_config(const struct intel_crtc_state *old_crtc_sta
 		I915_WRITE(SKL_BOTTOM_COLOR(crtc->pipe),
 			   SKL_BOTTOM_COLOR_GAMMA_ENABLE |
 			   SKL_BOTTOM_COLOR_CSC_ENABLE);
+
+	if (INTEL_GEN(dev_priv) >= 11)
+		icl_set_pipe_chicken(crtc);
 }
 
 static void intel_fdi_normal_train(struct intel_crtc *crtc)

Original file line number	Diff line number	Diff line change
`@@ -3958,6 +3958,9 @@ static void intel_update_pipe_config(const struct intel_crtc_state *old_crtc_sta`
`3958`	`3958`	`I915_WRITE(SKL_BOTTOM_COLOR(crtc->pipe),`
`3959`	`3959`	`SKL_BOTTOM_COLOR_GAMMA_ENABLE \|`
`3960`	`3960`	`SKL_BOTTOM_COLOR_CSC_ENABLE);`
	`3961`	`+`
	`3962`	`+ if (INTEL_GEN(dev_priv) >= 11)`
	`3963`	`+ icl_set_pipe_chicken(crtc);`
`3961`	`3964`	`}`
`3962`	`3965`
`3963`	`3966`	`static void intel_fdi_normal_train(struct intel_crtc *crtc)`