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Merge tag 'drm-fixes-2019-01-18' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie: "The rc3 fixes are a bit scattered: - meson, sun4i and rockchip all had missing of_node_put. - qxl and virtio both were advertising dma-buf to userspace when they really shouldn't have. Otherwise: meson: - modesetting regression fix i915 GVT: - one cmd parser failure fix - region cleanup fix in vGPU destroy amdgpu: - KFD fixes for arm64 mixed APU/DGPU - vega12 powerplay fix - raven DC fixes - freesync fix" * tag 'drm-fixes-2019-01-18' of git://anongit.freedesktop.org/drm/drm: drm/amd/display: Detach backlight from stream drm/sun4i: backend: add missing of_node_puts Revert "drm/amdgpu: validate user pitch alignment" Revert "drm/amdgpu: validate user GEM object size" drm/meson: Fix atomic mode switching regression drm/i915/gvt: Fix mmap range check drm/i915/gvt: free VFIO region space in vgpu detach drm/amd/display: Fix disabled cursor on top screen edge drm/amd/display: fix warning on raven hotplug drm/amd/display: fix PME notification not working in RV desktop drm/amd/display: Only get the connector state for VRR when toggled drm/amd/display: Pack DMCU iRAM alignment drm/amd/powerplay: run acg btc for Vega12 drm/amdkfd: Don't assign dGPUs to APU topology devices drm/amdkfd: Allow building KFD on ARM64 (v2) drm/meson: add missing of_node_put drm/virtio: drop prime import/export callbacks drm/qxl: drop prime import/export callbacks drm/i915/gvt: Allow F_CMD_ACCESS on mmio 0x21f0 drm/rockchip: add missing of_node_put
2 parents 2451f37 + df0219b commit 1092a94

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‎drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -531,17 +531,6 @@ amdgpu_display_user_framebuffer_create(struct drm_device *dev,
531531
struct drm_gem_object *obj;
532532
struct amdgpu_framebuffer *amdgpu_fb;
533533
int ret;
534-
int height;
535-
struct amdgpu_device *adev = dev->dev_private;
536-
int cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0);
537-
int pitch = mode_cmd->pitches[0] / cpp;
538-
539-
pitch = amdgpu_align_pitch(adev, pitch, cpp, false);
540-
if (mode_cmd->pitches[0] != pitch) {
541-
DRM_DEBUG_KMS("Invalid pitch: expecting %d but got %d\n",
542-
pitch, mode_cmd->pitches[0]);
543-
return ERR_PTR(-EINVAL);
544-
}
545534

546535
obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
547536
if (obj == NULL) {
@@ -556,13 +545,6 @@ amdgpu_display_user_framebuffer_create(struct drm_device *dev,
556545
return ERR_PTR(-EINVAL);
557546
}
558547

559-
height = ALIGN(mode_cmd->height, 8);
560-
if (obj->size < pitch * height) {
561-
DRM_DEBUG_KMS("Invalid GEM size: expecting >= %d but got %zu\n",
562-
pitch * height, obj->size);
563-
return ERR_PTR(-EINVAL);
564-
}
565-
566548
amdgpu_fb = kzalloc(sizeof(*amdgpu_fb), GFP_KERNEL);
567549
if (amdgpu_fb == NULL) {
568550
drm_gem_object_put_unlocked(obj);

‎drivers/gpu/drm/amd/amdkfd/Kconfig

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,8 @@
44

55
config HSA_AMD
66
bool "HSA kernel driver for AMD GPU devices"
7-
depends on DRM_AMDGPU && X86_64
8-
imply AMD_IOMMU_V2
7+
depends on DRM_AMDGPU && (X86_64 || ARM64)
8+
imply AMD_IOMMU_V2 if X86_64
99
select MMU_NOTIFIER
1010
help
1111
Enable this if you want to use HSA features on AMD GPU devices.

‎drivers/gpu/drm/amd/amdkfd/kfd_crat.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -863,6 +863,7 @@ static int kfd_fill_mem_info_for_cpu(int numa_node_id, int *avail_size,
863863
return 0;
864864
}
865865

866+
#if CONFIG_X86_64
866867
static int kfd_fill_iolink_info_for_cpu(int numa_node_id, int *avail_size,
867868
uint32_t *num_entries,
868869
struct crat_subtype_iolink *sub_type_hdr)
@@ -905,6 +906,7 @@ static int kfd_fill_iolink_info_for_cpu(int numa_node_id, int *avail_size,
905906

906907
return 0;
907908
}
909+
#endif
908910

909911
/* kfd_create_vcrat_image_cpu - Create Virtual CRAT for CPU
910912
*
@@ -920,7 +922,9 @@ static int kfd_create_vcrat_image_cpu(void *pcrat_image, size_t *size)
920922
struct crat_subtype_generic *sub_type_hdr;
921923
int avail_size = *size;
922924
int numa_node_id;
925+
#ifdef CONFIG_X86_64
923926
uint32_t entries = 0;
927+
#endif
924928
int ret = 0;
925929

926930
if (!pcrat_image || avail_size < VCRAT_SIZE_FOR_CPU)
@@ -982,6 +986,7 @@ static int kfd_create_vcrat_image_cpu(void *pcrat_image, size_t *size)
982986
sub_type_hdr->length);
983987

984988
/* Fill in Subtype: IO Link */
989+
#ifdef CONFIG_X86_64
985990
ret = kfd_fill_iolink_info_for_cpu(numa_node_id, &avail_size,
986991
&entries,
987992
(struct crat_subtype_iolink *)sub_type_hdr);
@@ -992,6 +997,9 @@ static int kfd_create_vcrat_image_cpu(void *pcrat_image, size_t *size)
992997

993998
sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
994999
sub_type_hdr->length * entries);
1000+
#else
1001+
pr_info("IO link not available for non x86 platforms\n");
1002+
#endif
9951003

9961004
crat_table->num_domains++;
9971005
}

‎drivers/gpu/drm/amd/amdkfd/kfd_topology.c

Lines changed: 14 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1093,21 +1093,27 @@ static uint32_t kfd_generate_gpu_id(struct kfd_dev *gpu)
10931093
* the GPU device is not already present in the topology device
10941094
* list then return NULL. This means a new topology device has to
10951095
* be created for this GPU.
1096-
* TODO: Rather than assiging @gpu to first topology device withtout
1097-
* gpu attached, it will better to have more stringent check.
10981096
*/
10991097
static struct kfd_topology_device *kfd_assign_gpu(struct kfd_dev *gpu)
11001098
{
11011099
struct kfd_topology_device *dev;
11021100
struct kfd_topology_device *out_dev = NULL;
11031101

11041102
down_write(&topology_lock);
1105-
list_for_each_entry(dev, &topology_device_list, list)
1103+
list_for_each_entry(dev, &topology_device_list, list) {
1104+
/* Discrete GPUs need their own topology device list
1105+
* entries. Don't assign them to CPU/APU nodes.
1106+
*/
1107+
if (!gpu->device_info->needs_iommu_device &&
1108+
dev->node_props.cpu_cores_count)
1109+
continue;
1110+
11061111
if (!dev->gpu && (dev->node_props.simd_count > 0)) {
11071112
dev->gpu = gpu;
11081113
out_dev = dev;
11091114
break;
11101115
}
1116+
}
11111117
up_write(&topology_lock);
11121118
return out_dev;
11131119
}
@@ -1392,17 +1398,18 @@ int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev)
13921398

13931399
static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask)
13941400
{
1395-
const struct cpuinfo_x86 *cpuinfo;
13961401
int first_cpu_of_numa_node;
13971402

13981403
if (!cpumask || cpumask == cpu_none_mask)
13991404
return -1;
14001405
first_cpu_of_numa_node = cpumask_first(cpumask);
14011406
if (first_cpu_of_numa_node >= nr_cpu_ids)
14021407
return -1;
1403-
cpuinfo = &cpu_data(first_cpu_of_numa_node);
1404-
1405-
return cpuinfo->apicid;
1408+
#ifdef CONFIG_X86_64
1409+
return cpu_data(first_cpu_of_numa_node).apicid;
1410+
#else
1411+
return first_cpu_of_numa_node;
1412+
#endif
14061413
}
14071414

14081415
/* kfd_numa_node_to_apic_id - Returns the APIC ID of the first logical processor

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1772,7 +1772,7 @@ static int amdgpu_dm_backlight_update_status(struct backlight_device *bd)
17721772
+ caps.min_input_signal * 0x101;
17731773

17741774
if (dc_link_set_backlight_level(dm->backlight_link,
1775-
brightness, 0, 0))
1775+
brightness, 0))
17761776
return 0;
17771777
else
17781778
return 1;
@@ -5933,7 +5933,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
59335933
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
59345934
if (!drm_atomic_crtc_needs_modeset(new_crtc_state) &&
59355935
!new_crtc_state->color_mgmt_changed &&
5936-
!new_crtc_state->vrr_enabled)
5936+
old_crtc_state->vrr_enabled == new_crtc_state->vrr_enabled)
59375937
continue;
59385938

59395939
if (!new_crtc_state->enable)

‎drivers/gpu/drm/amd/display/dc/core/dc_link.c

Lines changed: 1 addition & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2190,8 +2190,7 @@ int dc_link_get_backlight_level(const struct dc_link *link)
21902190

21912191
bool dc_link_set_backlight_level(const struct dc_link *link,
21922192
uint32_t backlight_pwm_u16_16,
2193-
uint32_t frame_ramp,
2194-
const struct dc_stream_state *stream)
2193+
uint32_t frame_ramp)
21952194
{
21962195
struct dc *core_dc = link->ctx->dc;
21972196
struct abm *abm = core_dc->res_pool->abm;
@@ -2206,10 +2205,6 @@ bool dc_link_set_backlight_level(const struct dc_link *link,
22062205
(abm->funcs->set_backlight_level_pwm == NULL))
22072206
return false;
22082207

2209-
if (stream)
2210-
((struct dc_stream_state *)stream)->bl_pwm_level =
2211-
backlight_pwm_u16_16;
2212-
22132208
use_smooth_brightness = dmcu->funcs->is_dmcu_initialized(dmcu);
22142209

22152210
DC_LOG_BACKLIGHT("New Backlight level: %d (0x%X)\n",
@@ -2637,11 +2632,6 @@ void core_link_enable_stream(
26372632

26382633
if (dc_is_dp_signal(pipe_ctx->stream->signal))
26392634
enable_stream_features(pipe_ctx);
2640-
2641-
dc_link_set_backlight_level(pipe_ctx->stream->sink->link,
2642-
pipe_ctx->stream->bl_pwm_level,
2643-
0,
2644-
pipe_ctx->stream);
26452635
}
26462636

26472637
}

‎drivers/gpu/drm/amd/display/dc/dc_link.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -146,8 +146,7 @@ static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_
146146
*/
147147
bool dc_link_set_backlight_level(const struct dc_link *dc_link,
148148
uint32_t backlight_pwm_u16_16,
149-
uint32_t frame_ramp,
150-
const struct dc_stream_state *stream);
149+
uint32_t frame_ramp);
151150

152151
int dc_link_get_backlight_level(const struct dc_link *dc_link);
153152

‎drivers/gpu/drm/amd/display/dc/dc_stream.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,6 @@ struct dc_stream_state {
9191

9292
/* DMCU info */
9393
unsigned int abm_level;
94-
unsigned int bl_pwm_level;
9594

9695
/* from core_stream struct */
9796
struct dc_context *ctx;

‎drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1000,7 +1000,7 @@ void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx)
10001000

10011001
pipe_ctx->stream_res.audio->funcs->az_enable(pipe_ctx->stream_res.audio);
10021002

1003-
if (num_audio == 1 && pp_smu != NULL && pp_smu->set_pme_wa_enable != NULL)
1003+
if (num_audio >= 1 && pp_smu != NULL && pp_smu->set_pme_wa_enable != NULL)
10041004
/*this is the first audio. apply the PME w/a in order to wake AZ from D3*/
10051005
pp_smu->set_pme_wa_enable(&pp_smu->pp_smu);
10061006
/* un-mute audio */
@@ -1017,6 +1017,8 @@ void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx, int option)
10171017
pipe_ctx->stream_res.stream_enc->funcs->audio_mute_control(
10181018
pipe_ctx->stream_res.stream_enc, true);
10191019
if (pipe_ctx->stream_res.audio) {
1020+
struct pp_smu_funcs_rv *pp_smu = dc->res_pool->pp_smu;
1021+
10201022
if (option != KEEP_ACQUIRED_RESOURCE ||
10211023
!dc->debug.az_endpoint_mute_only) {
10221024
/*only disalbe az_endpoint if power down or free*/
@@ -1036,6 +1038,9 @@ void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx, int option)
10361038
update_audio_usage(&dc->current_state->res_ctx, dc->res_pool, pipe_ctx->stream_res.audio, false);
10371039
pipe_ctx->stream_res.audio = NULL;
10381040
}
1041+
if (pp_smu != NULL && pp_smu->set_pme_wa_enable != NULL)
1042+
/*this is the first audio. apply the PME w/a in order to wake AZ from D3*/
1043+
pp_smu->set_pme_wa_enable(&pp_smu->pp_smu);
10391044

10401045
/* TODO: notify audio driver for if audio modes list changed
10411046
* add audio mode list change flag */

‎drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -463,7 +463,7 @@ void dpp1_set_cursor_position(
463463
if (src_y_offset >= (int)param->viewport.height)
464464
cur_en = 0; /* not visible beyond bottom edge*/
465465

466-
if (src_y_offset < 0)
466+
if (src_y_offset + (int)height <= 0)
467467
cur_en = 0; /* not visible beyond top edge*/
468468

469469
REG_UPDATE(CURSOR0_CONTROL,

‎drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1140,7 +1140,7 @@ void hubp1_cursor_set_position(
11401140
if (src_y_offset >= (int)param->viewport.height)
11411141
cur_en = 0; /* not visible beyond bottom edge*/
11421142

1143-
if (src_y_offset < 0) //+ (int)hubp->curs_attr.height
1143+
if (src_y_offset + (int)hubp->curs_attr.height <= 0)
11441144
cur_en = 0; /* not visible beyond top edge*/
11451145

11461146
if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0)

‎drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

Lines changed: 6 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -2355,29 +2355,22 @@ static void dcn10_apply_ctx_for_surface(
23552355
top_pipe_to_program->plane_state->update_flags.bits.full_update)
23562356
for (i = 0; i < dc->res_pool->pipe_count; i++) {
23572357
struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
2358-
2358+
tg = pipe_ctx->stream_res.tg;
23592359
/* Skip inactive pipes and ones already updated */
23602360
if (!pipe_ctx->stream || pipe_ctx->stream == stream
2361-
|| !pipe_ctx->plane_state)
2361+
|| !pipe_ctx->plane_state
2362+
|| !tg->funcs->is_tg_enabled(tg))
23622363
continue;
23632364

2364-
pipe_ctx->stream_res.tg->funcs->lock(pipe_ctx->stream_res.tg);
2365+
tg->funcs->lock(tg);
23652366

23662367
pipe_ctx->plane_res.hubp->funcs->hubp_setup_interdependent(
23672368
pipe_ctx->plane_res.hubp,
23682369
&pipe_ctx->dlg_regs,
23692370
&pipe_ctx->ttu_regs);
2370-
}
2371-
2372-
for (i = 0; i < dc->res_pool->pipe_count; i++) {
2373-
struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
23742371

2375-
if (!pipe_ctx->stream || pipe_ctx->stream == stream
2376-
|| !pipe_ctx->plane_state)
2377-
continue;
2378-
2379-
dcn10_pipe_control_lock(dc, pipe_ctx, false);
2380-
}
2372+
tg->funcs->unlock(tg);
2373+
}
23812374

23822375
if (num_planes == 0)
23832376
false_optc_underflow_wa(dc, stream, tg);

‎drivers/gpu/drm/amd/display/modules/power/power_helpers.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,7 @@ static const unsigned char abm_config[abm_defines_max_config][abm_defines_max_le
5757
#define NUM_POWER_FN_SEGS 8
5858
#define NUM_BL_CURVE_SEGS 16
5959

60+
#pragma pack(push, 1)
6061
/* NOTE: iRAM is 256B in size */
6162
struct iram_table_v_2 {
6263
/* flags */
@@ -100,6 +101,7 @@ struct iram_table_v_2 {
100101
uint8_t dummy8; /* 0xfe */
101102
uint8_t dummy9; /* 0xff */
102103
};
104+
#pragma pack(pop)
103105

104106
static uint16_t backlight_8_to_16(unsigned int backlight_8bit)
105107
{

‎drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -753,6 +753,22 @@ static int vega12_init_smc_table(struct pp_hwmgr *hwmgr)
753753
return 0;
754754
}
755755

756+
static int vega12_run_acg_btc(struct pp_hwmgr *hwmgr)
757+
{
758+
uint32_t result;
759+
760+
PP_ASSERT_WITH_CODE(
761+
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgBtc) == 0,
762+
"[Run_ACG_BTC] Attempt to run ACG BTC failed!",
763+
return -EINVAL);
764+
765+
result = smum_get_argument(hwmgr);
766+
PP_ASSERT_WITH_CODE(result == 1,
767+
"Failed to run ACG BTC!", return -EINVAL);
768+
769+
return 0;
770+
}
771+
756772
static int vega12_set_allowed_featuresmask(struct pp_hwmgr *hwmgr)
757773
{
758774
struct vega12_hwmgr *data =
@@ -931,6 +947,11 @@ static int vega12_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
931947
"Failed to initialize SMC table!",
932948
result = tmp_result);
933949

950+
tmp_result = vega12_run_acg_btc(hwmgr);
951+
PP_ASSERT_WITH_CODE(!tmp_result,
952+
"Failed to run ACG BTC!",
953+
result = tmp_result);
954+
934955
result = vega12_enable_all_smu_features(hwmgr);
935956
PP_ASSERT_WITH_CODE(!result,
936957
"Failed to enable all smu features!",

‎drivers/gpu/drm/i915/gvt/handlers.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2799,6 +2799,7 @@ static int init_broadwell_mmio_info(struct intel_gvt *gvt)
27992799
MMIO_DFH(_MMIO(0xe2a0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);
28002800
MMIO_DFH(_MMIO(0xe2b0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);
28012801
MMIO_DFH(_MMIO(0xe2c0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);
2802+
MMIO_DFH(_MMIO(0x21f0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);
28022803
return 0;
28032804
}
28042805

‎drivers/gpu/drm/i915/gvt/hypercall.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ struct intel_gvt_mpt {
4141
int (*host_init)(struct device *dev, void *gvt, const void *ops);
4242
void (*host_exit)(struct device *dev, void *gvt);
4343
int (*attach_vgpu)(void *vgpu, unsigned long *handle);
44-
void (*detach_vgpu)(unsigned long handle);
44+
void (*detach_vgpu)(void *vgpu);
4545
int (*inject_msi)(unsigned long handle, u32 addr, u16 data);
4646
unsigned long (*from_virt_to_mfn)(void *p);
4747
int (*enable_page_track)(unsigned long handle, u64 gfn);

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